[Intel-gfx] [PATCH 8/8] drm/i915: Remove the now obsolete infoframe definitions

[Ville Syrjälä]

On Fri, Aug 02, 2013 at 06:23:00PM +0100, Damien Lespiau wrote:
> All the HDMI infoframe code has been ported to use video/hdmi.c, so it's
> time to say bye bye to this code.
> 
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>

I'm no compiler, but fwiw:

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_drv.h  | 61 ---------------------------------------
>  drivers/gpu/drm/i915/intel_hdmi.c | 15 ----------
>  2 files changed, 76 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index f8c21ac..98ff8b7 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -394,66 +394,6 @@ struct cxsr_latency {
>  #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
>  #define to_intel_plane(x) container_of(x, struct intel_plane, base)
>  
> -#define DIP_HEADER_SIZE	5
> -
> -#define DIP_TYPE_AVI    0x82
> -#define DIP_VERSION_AVI 0x2
> -#define DIP_LEN_AVI     13
> -#define DIP_AVI_PR_1    0
> -#define DIP_AVI_PR_2    1
> -#define DIP_AVI_RGB_QUANT_RANGE_DEFAULT	(0 << 2)
> -#define DIP_AVI_RGB_QUANT_RANGE_LIMITED	(1 << 2)
> -#define DIP_AVI_RGB_QUANT_RANGE_FULL	(2 << 2)
> -
> -#define DIP_TYPE_SPD	0x83
> -#define DIP_VERSION_SPD	0x1
> -#define DIP_LEN_SPD	25
> -#define DIP_SPD_UNKNOWN	0
> -#define DIP_SPD_DSTB	0x1
> -#define DIP_SPD_DVDP	0x2
> -#define DIP_SPD_DVHS	0x3
> -#define DIP_SPD_HDDVR	0x4
> -#define DIP_SPD_DVC	0x5
> -#define DIP_SPD_DSC	0x6
> -#define DIP_SPD_VCD	0x7
> -#define DIP_SPD_GAME	0x8
> -#define DIP_SPD_PC	0x9
> -#define DIP_SPD_BD	0xa
> -#define DIP_SPD_SCD	0xb
> -
> -struct dip_infoframe {
> -	uint8_t type;		/* HB0 */
> -	uint8_t ver;		/* HB1 */
> -	uint8_t len;		/* HB2 - body len, not including checksum */
> -	uint8_t ecc;		/* Header ECC */
> -	uint8_t checksum;	/* PB0 */
> -	union {
> -		struct {
> -			/* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
> -			uint8_t Y_A_B_S;
> -			/* PB2 - C 7:6, M 5:4, R 3:0 */
> -			uint8_t C_M_R;
> -			/* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
> -			uint8_t ITC_EC_Q_SC;
> -			/* PB4 - VIC 6:0 */
> -			uint8_t VIC;
> -			/* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
> -			uint8_t YQ_CN_PR;
> -			/* PB6 to PB13 */
> -			uint16_t top_bar_end;
> -			uint16_t bottom_bar_start;
> -			uint16_t left_bar_end;
> -			uint16_t right_bar_start;
> -		} __attribute__ ((packed)) avi;
> -		struct {
> -			uint8_t vn[8];
> -			uint8_t pd[16];
> -			uint8_t sdi;
> -		} __attribute__ ((packed)) spd;
> -		uint8_t payload[27];
> -	} __attribute__ ((packed)) body;
> -} __attribute__((packed));
> -
>  struct intel_hdmi {
>  	u32 hdmi_reg;
>  	int ddc_bus;
> @@ -567,7 +507,6 @@ extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
>  extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
>  extern bool intel_hdmi_compute_config(struct intel_encoder *encoder,
>  				      struct intel_crtc_config *pipe_config);
> -extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
>  extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
>  			    bool is_sdvob);
>  extern void intel_dvo_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 8424882..85dff3f 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -67,21 +67,6 @@ static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
>  	return enc_to_intel_hdmi(&intel_attached_encoder(connector)->base);
>  }
>  
> -void intel_dip_infoframe_csum(struct dip_infoframe *frame)
> -{
> -	uint8_t *data = (uint8_t *)frame;
> -	uint8_t sum = 0;
> -	unsigned i;
> -
> -	frame->checksum = 0;
> -	frame->ecc = 0;
> -
> -	for (i = 0; i < frame->len + DIP_HEADER_SIZE; i++)
> -		sum += data[i];
> -
> -	frame->checksum = 0x100 - sum;
> -}
> -
>  static u32 g4x_infoframe_index(enum hdmi_infoframe_type type)
>  {
>  	switch (type) {
> -- 
> 1.8.3.1
> 
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-- 
Ville Syrjälä
Intel OTC