[Intel-gfx] [PATCH 2/4] drm/i915: Update rules for reading cache lines through the LLC

[Chris Wilson]

On Tue, Aug 06, 2013 at 03:31:02PM +0200, Daniel Vetter wrote:
> Since this is a behavioural change wrt cache coherency can we please have
> an igt testcase to exercise pwrite/pread coherency on uncached buffers on
> LLC platforms? With the set_caching ioctl it should be fairly easy to add
> another subtest to the relevant existing igts.

Right, easy enough. Next step is play with scanout as well because we're
proposing to special case it.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre