[Intel-gfx] [PATCH 14/29] drm/i915: Restore PDEs on gtt restore

[Daniel Vetter]

On Wed, Jul 31, 2013 at 05:00:07PM -0700, Ben Widawsky wrote:
> I can't remember why I added this initially.
> 
> TODO: Throw out if not necessary
> 
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>

Oops. I vaguely remember that there was some shuffling around with where
the ppgtt pdes are written once we have real ppgtt. Since the aliasing
ppgtt isn't a real ppgtt it could be that the write_pdes call in
gen6_ppgtt_enable isn't executed any more and hence we need to do this
manually.

Otoh it's looks like we should just call gen6_ppgtt_enable in such a case.
So I can't really help with a reason why we need this. I'm pretty sure
that we don't need it right now, so I'll punt for now. But please keep it
in mind when rebasing the real ppgtt stuff on top, once the VMA patches
are merged to dinq.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 1ed9acb..e9b269f 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -470,6 +470,9 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
>  				       dev_priv->gtt.base.start / PAGE_SIZE,
>  				       dev_priv->gtt.base.total / PAGE_SIZE);
>  
> +	if (dev_priv->mm.aliasing_ppgtt)
> +		gen6_write_pdes(dev_priv->mm.aliasing_ppgtt);
> +
>  	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
>  		i915_gem_clflush_object(obj);
>  		i915_gem_gtt_bind_object(obj, obj->cache_level);
> -- 
> 1.8.3.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch