[Intel-gfx] [PATCH] drm/i915: Align tiled scanouts from stolen memory to 256k in the GTT

Chris Wilson chris at chris-wilson.co.uk
Mon Aug 12 11:42:30 CEST 2013


On Mon, Aug 12, 2013 at 12:38:03PM +0300, Ville Syrjälä wrote:
> On Sun, Aug 11, 2013 at 11:17:28PM +0100, Chris Wilson wrote:
> > For unfathomable reasons this alignment appears to be required for tiled
> > scanouts being read from stolen memory. I can find no reference in the
> > w/a db to support this requirement, but the evidence of my own eyes says
> > this prevents many headaches.
> > 
> > Note that I have not tricked anything older than Sandybridge into using
> > stolen tiled scanouts, so the extra alignment may be required there as
> > well.
> 
> Strange. I can't find anything except async flips and vt-d which would
> require 256k alignment.

I can empathically state it is required though. It might not be 256k,
that's just the first value that stopped giving me headaches. :)
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre



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