[Intel-gfx] [PATCH] drm/i915: Drop the overzealous warning from i915_gem_set_cache_level

[Chris Wilson]

On Tue, Aug 13, 2013 at 03:12:59PM +0300, Ville Syrjälä wrote:
> Thinking about this stuff a bit, I think I actually came up with a
> scenario where we would currently fail to invalidate the CPU cache
> between non-snooped GPU/GTT access and CPU access:
> 
> 1. make bo non-snooped w/ pin_display=true (wd=0, rd|=gtt)
> 2. set to CPU read domain (wd=0 rd|=cpu)
> 3. set to GTT (or GPU) write domain (wd=gtt, rd=gtt) -> CPU cache is stale after this point
> 4. make bo snooped -> pin_display=true still so we directly set (wd=cpu, rd=cpu)
> 5. set to CPU domain -> CPU cache is still stale

You will also find the scanout reads stale data as well. You've managed
to shoot yourself in both feet. The kernel can't fix that, so should we
care about the other foot?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre