[Intel-gfx] [PATCH 4/9] drm/i915: don't update GEN6_PMIMR when it's not needed

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>

I liked this very much... we should do this kind of check in more places...

On Tue, Aug 06, 2013 at 06:57:14PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> I did some brief tests and the "new_val = pmimr" condition usually
> happens a few times after exiting games.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 14 +++++++++-----
>  1 file changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index a00fe05..a1255da 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -142,14 +142,18 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv,
>  			      uint32_t interrupt_mask,
>  			      uint32_t enabled_irq_mask)
>  {
> -	uint32_t pmimr = I915_READ(GEN6_PMIMR);
> -	pmimr &= ~interrupt_mask;
> -	pmimr |= (~enabled_irq_mask & interrupt_mask);
> +	uint32_t pmimr, new_val;
>  
>  	assert_spin_locked(&dev_priv->irq_lock);
>  
> -	I915_WRITE(GEN6_PMIMR, pmimr);
> -	POSTING_READ(GEN6_PMIMR);
> +	pmimr = new_val = I915_READ(GEN6_PMIMR);
> +	new_val &= ~interrupt_mask;
> +	new_val |= (~enabled_irq_mask & interrupt_mask);
> +
> +	if (new_val != pmimr) {
> +		I915_WRITE(GEN6_PMIMR, new_val);
> +		POSTING_READ(GEN6_PMIMR);
> +	}
>  }
>  
>  void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask)
> -- 
> 1.8.1.2
> 
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