[Intel-gfx] [PATCH] i915: Use 120MHz LVDS SSC clock for gen5/gen6/gen7

[james.ausmus at intel.com]

From: Duncan Laurie <dlaurie at chromium.org>

We had been using a DMI table workaround to select the right
frequency for devices, but this is fragile and must be updated
with every new platform.

Instead the default case when VBT is missing is changed to use
120MHz clock for LVDS SSC for these generations.

The docs for 2010-Core, SandyBridge, and IvyBridge all indicate
that the reference frequency for LVDS is 120MHz:

"2010 Core"
http://intellinuxgraphics.org/IHD_OS_Vol3_Part3r2.pdf
page 38
Reference Frequency: 120MHz for CRT and LVDS.  100MHz for the FDI.

"2011 SandyBridge"
http://intellinuxgraphics.org/documentation/SNB/IHD_OS_Vol3_Part3.pdf
page 33
Reference Frequency: 120MHz for CRT, HDMI, LVDS.  100MHz for the FDI.

"2012 IvyBridge"
http://intellinuxgraphics.org/documentation/IVB/IHD_OS_Vol3_Part4.pdf
page 27
Reference Frequency: 120 MHz for CRT, HDMI, LVDS, 100MHz for the FDI.

BUG=chrome-os-partner:11744
TEST=manual: boot on Lumpy and Parrot with and without VBIOS

Change-Id: Ieae3d37d4a5f6eb11c45a5e2fa76b0c106404e69
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/28274
Reviewed-by: Marc Jones <marc.jones at se-eng.com>
[marcheu: fixups for 3.8]
Signed-off-by: Stéphane Marchesin <marcheu at chromium.org>
---
 drivers/gpu/drm/i915/intel_bios.c | 15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index b6a8b69..7aa5fc1 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -631,17 +631,6 @@ parse_device_mapping(struct drm_i915_private *dev_priv,
 	return;
 }
 
-static const struct dmi_system_id lvds_do_not_use_alternate_frequency[] = {
-	{
-		.callback = NULL,
-		.ident = "Lumpy",
-		.matches = {
-			DMI_MATCH(DMI_PRODUCT_NAME, "Lumpy"),
-		}
-	},
-	{ }
-};
-
 static void
 init_vbt_defaults(struct drm_i915_private *dev_priv)
 {
@@ -662,7 +651,9 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
 
 	/* Default to using SSC */
 	dev_priv->lvds_use_ssc = 1;
-	if (dmi_check_system(lvds_do_not_use_alternate_frequency))
+
+	/* Core/SandyBridge/IvyBridge use 120MHz reference clock for LVDS */
+	if (HAS_PCH_SPLIT(dev))
 		dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 0);
 	else
 		dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
-- 
1.8.3.2