[Intel-gfx] [PATCH] CHROMIUM: gpu: i915: optimize vblank timeout

[james.ausmus at intel.com]

From: Vincent Palatin <vpalatin at chromium.org>

On the resume path, wait_for_vblank is called 4 times and waits until its
timeout. To reduce the delays on that path, let's compute the maximum vblank
delay instead of always using the arbitrary 50 ms value.

Signed-off-by: Vincent Palatin <vpalatin at chromium.org>

BUG=chrome-os-partner:13364
TEST=On Link, measure resume time and see a 130ms improvement.

Change-Id: I88231de43573432b6d71255f622eb9860fe3c28d
Reviewed-on: https://gerrit.chromium.org/gerrit/34624
Reviewed-by: Sameer Nanda <snanda at chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu at chromium.org>
Commit-Ready: Vincent Palatin <vpalatin at chromium.org>
Tested-by: Vincent Palatin <vpalatin at chromium.org>
[marcheu: fixup for 3.8 rebase]
---
 drivers/gpu/drm/i915/intel_display.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index da1ad9c..0bc822e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -967,6 +967,9 @@ void intel_wait_for_vblank(struct drm_device *dev, int pipe)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int pipestat_reg = PIPESTAT(pipe);
+	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
+	int timeout = crtc->hwmode.vrefresh ?
+		DIV_ROUND_UP(1000, crtc->hwmode.vrefresh) : 50;
 
 	if (INTEL_INFO(dev)->gen >= 5) {
 		ironlake_wait_for_vblank(dev, pipe);
@@ -992,7 +995,7 @@ void intel_wait_for_vblank(struct drm_device *dev, int pipe)
 	/* Wait for vblank interrupt bit to set */
 	if (wait_for(I915_READ(pipestat_reg) &
 		     PIPE_VBLANK_INTERRUPT_STATUS,
-		     50))
+		     timeout))
 		DRM_DEBUG_KMS("vblank wait timed out\n");
 }
 
-- 
1.8.3.2