[Intel-gfx] [PATCH] CHROMIUM: drm/i915: Check the current edp backlight state before changing it.

[james.ausmus at intel.com]

From: Stéphane Marchesin <marcheu at chromium.org>

This speeds up boot and suspend/resume times.

BUG=chrome-os-partner:13364
TEST=by hand

Change-Id: I8d7b7a22c50bcf32828d492e123ce301cefa297d
Reviewed-on: https://gerrit.chromium.org/gerrit/37047
Reviewed-by: Simon Que <sque at chromium.org>
Commit-Ready: Stéphane Marchesin <marcheu at chromium.org>
Tested-by: Stéphane Marchesin <marcheu at chromium.org>
---
 drivers/gpu/drm/i915/intel_dp.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 29013de..f763d45 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1195,6 +1195,10 @@ void ironlake_edp_backlight_on(struct intel_dp *intel_dp)
 		return;
 
 	DRM_DEBUG_KMS("\n");
+	pp = ironlake_get_pp_control(dev_priv);
+	if (pp & EDP_BLC_ENABLE)
+		return;
+
 	/*
 	 * If we enable the backlight right away following a panel power
 	 * on, we may see slight flicker as the panel syncs with the eDP
@@ -1202,7 +1206,6 @@ void ironlake_edp_backlight_on(struct intel_dp *intel_dp)
 	 * allowing it to appear.
 	 */
 	msleep(intel_dp->backlight_on_delay);
-	pp = ironlake_get_pp_control(dev_priv);
 	pp |= EDP_BLC_ENABLE;
 	I915_WRITE(PCH_PP_CONTROL, pp);
 	POSTING_READ(PCH_PP_CONTROL);
@@ -1223,6 +1226,8 @@ void ironlake_edp_backlight_off(struct intel_dp *intel_dp)
 
 	DRM_DEBUG_KMS("\n");
 	pp = ironlake_get_pp_control(dev_priv);
+	if (!(pp & EDP_BLC_ENABLE))
+		return;
 	pp &= ~EDP_BLC_ENABLE;
 	I915_WRITE(PCH_PP_CONTROL, pp);
 	POSTING_READ(PCH_PP_CONTROL);
-- 
1.8.3.2