[Intel-gfx] [PATCH 6/9] drm/i915: don't disable/reenable IVB error interrupts when not needed

Paulo Zanoni przanoni at gmail.com
Tue Aug 20 16:43:46 CEST 2013


2013/8/20 Daniel Vetter <daniel at ffwll.ch>:
> On Tue, Aug 06, 2013 at 06:57:16PM -0300, Paulo Zanoni wrote:
>> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
>>
>> If the error interrupts are already disabled, don't disable and
>> reenable them. This is going to be needed when we're in PC8+, where
>> all the interrupts are disabled so we won't risk re-enabling
>> DE_ERR_INT_IVB.
>>
>> v2: Use dev_priv->irq_mask (Chris)
>>
>> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_irq.c | 7 +++++--
>>  1 file changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index d96bd1b..5e7e6f6 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -1373,6 +1373,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>>       drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
>>       u32 de_iir, gt_iir, de_ier, sde_ier = 0;
>>       irqreturn_t ret = IRQ_NONE;
>> +     bool err_int_reenable = false;
>>
>>       atomic_inc(&dev_priv->irq_received);
>>
>> @@ -1401,7 +1402,9 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>>        * handler. */
>>       if (IS_HASWELL(dev)) {
>>               spin_lock(&dev_priv->irq_lock);
>> -             ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
>> +             err_int_reenable = ~dev_priv->irq_mask & DE_ERR_INT_IVB;
>> +             if (err_int_reenable)
>> +                     ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
>
> Hm, that reminds me that this entire logic here is racy wrt concurrent
> interrupt enabling on a different cpu core (e.g. due to a modeset now
> again allowing display error interrupts). Do we still need this or could
> we just ditch this entire complexity?

Can you please explain more? We still check ivb_can_enable_err_int
before reenabling.


>
> Maybe I'm just engaging in wishful thinking here a bit ;-)
>
> Patch applied.
> -Daniel
>
>>               spin_unlock(&dev_priv->irq_lock);
>>       }
>>
>> @@ -1437,7 +1440,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
>>               }
>>       }
>>
>> -     if (IS_HASWELL(dev)) {
>> +     if (err_int_reenable) {
>>               spin_lock(&dev_priv->irq_lock);
>>               if (ivb_can_enable_err_int(dev))
>>                       ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
>> --
>> 1.8.1.2
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx at lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch



-- 
Paulo Zanoni



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