[Intel-gfx] [PATCH] drm/i915: Fix context size calculation on SNB/IVB/VLV

[Ville Syrjälä]

On Thu, Aug 22, 2013 at 11:30:55AM -0700, Ben Widawsky wrote:
> On Thu, Aug 22, 2013 at 07:23:13PM +0300, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > All the different context sizes reported in the CXT_SIZE register
> > aren't meant to be simply added together.
> > 
> > While BSpec is somewhat unclear on the topic of the actual context
> > size, empirical tests have now revealed the truth. So let's add a
> > big fat comment to remind people how it all works.
> 
> By the way. I've done some digging. I believe (75% certain) pre-HSW,
> every context save writes the entire data. So if you wanted to set some
> pattern and see what HW actually overwrites, it should be doable. HSW+
> though we can't do that.

So I did this test on SNB and IVB and it confirms my earlier findings.
This experiment also showed that while SNB leaves room for the ring
context, it doesn't actually write to it.

-- 
Ville Syrjälä
Intel OTC