[Intel-gfx] [PULL] drm-intel-next
Daniel Vetter
daniel at ffwll.ch
Fri Aug 30 01:18:11 CEST 2013
Hi Dave,
Need to get my stuff out the door ;-) Highlights:
- pc8+ support from Paulo
- more vma patches from Ben.
- Kconfig option to enable preliminary support by default (Josh
Triplett)
- Optimized cpu cache flush handling and support for write-through caching
of display planes on Iris (Chris)
- rc6 tuning from Stéphane Marchesin for more stability
- VECS seqno wrap/semaphores fix (Ben)
- a pile of smaller cleanups and improvements all over
Note that I've ditched Ben's execbuf vma conversion for 3.12 since not yet
ready. But there's still other vma conversion stuff in here.
Cheers, Daniel
The following changes since commit 5c536613d8ebda3da0448550d0a997651a6048e2:
drm/i915: Fix FB WM for HSW (2013-08-09 20:27:43 +0200)
are available in the git repository at:
git://people.freedesktop.org/~danvet/drm-intel tags/drm-intel-next-2013-08-23
for you to fetch changes up to fb1ae911f4e58c2cf28fcd48b59f54d17283da07:
drm/i915: Print seqnos as unsigned in debugfs (2013-08-23 14:52:37 +0200)
----------------------------------------------------------------
Ben Widawsky (10):
drm/i915: WARN_ON failed map_and_fenceable
drm/i915: Initialize seqno for VECS too
drm/i915: Get VECS semaphore info on error
drm/i915: Remove node only when allocated
drm/i915: cleanup map&fence in bind
drm: WARN when removing unallocated node
drm/i915: s/obj->exec_list/obj->obj_exec_link in debugfs
drm/i915: Switch eviction code to use vmas
drm/i915: prepare bind_to_vm for preallocated vma
drm/i915/vma: Correct use after free in eviction
Chris Wilson (9):
drm/i915: Update rules for reading cache lines through the LLC
drm/i915: Track when an object is pinned for use by the display engine
drm/i915: Update rules for writing through the LLC with the cpu
drm/i915: Allow the GPU to cache stolen memory
drm/i915: Only do a chipset flush after a clflush
drm/i915: Use Write-Through cacheing for the display plane on Iris
drm/i915: Allow the user to set bo into the DISPLAY cache domain
drm/i915: Print the changes required for modeset
drm/i915: Drop the overzealous warning from i915_gem_set_cache_level
Damien Lespiau (4):
drm/i915: Remove DSPARB_HWCONTROL()
drm/i915: Remove HAS_PIPE_CONTROL()
drm: Remove IS_IRONLAKE_D()
drm/i915: Remove I915_READ_{NOPID, SYNC_0, SYNC_1})()
Daniel Vetter (6):
drm/i915: reserve I915_CACHING_DISPLAY and document cache modes
drm/i915: clarify error paths in create_stolen_for_preallocated
drm/i915: use vma->node directly and rewrap map&fence in bind
drm/i915: unpin backing storage in dmabuf_unmap
drm/i915: explicit store base gem object in dma_buf->priv
drm/i915: Use POSTING_READ in lcpll code
Guillaume Clement (1):
i915: Fix SDVO potentially turning off randomly
Jani Nikula (3):
drm/i915: remove unused leftover variable irq_received
drm/i915: give more distinctive names to ring hangcheck action enums
drm/i915: drop unnecessary local variable to suppress build warning
Jesse Barnes (3):
drm/i915: make IVB FDI training match spec v3
drm/i915: Expose energy counter on SNB+ through debugfs
drm/i915: drop WaMbcDriverBootEnable workaround
Josh Triplett (1):
i915: Add a Kconfig option to turn on i915.preliminary_hw_support by default
Paulo Zanoni (20):
drm/i915: remove set but unused variables
drm/i915: print a message when we detect an early Haswell SDV
drm/i915: check the power well when redisabling VGA
drm/i915: clarify Haswell power well bit names
drm/i915: enable the power well before module unload
drm/i915: add the FCLK case to intel_ddi_get_cdclk_freq
drm/i915: wrap GTIMR changes
drm/i915: wrap GEN6_PMIMR changes
drm/i915: don't update GEN6_PMIMR when it's not needed
drm/i915: add dev_priv->pm_irq_mask
drm/i915: don't disable/reenable IVB error interrupts when not needed
drm/i915: don't queue PM events we won't process
drm/i915: fix how we mask PMIMR when adding work to the queue
drm/i915: merge HSW and SNB PM irq handlers
drm/i915: grab force_wake when restoring LCPLL
drm/i915: fix SDEIMR assertion when disabling LCPLL
drm/i915: allow package C8+ states on Haswell (disabled)
drm/i915: add i915_pc8_status debugfs file
drm/i915: add i915.pc8_timeout function
drm/i915: enable Package C8+ by default
Rafael Barbalho (1):
drm/i915: Cleaning up the relocate entry function
Stéphane Marchesin (1):
drm/i915: tune the RC6 threshold for stability
Ville Syrjälä (2):
drm/i915: Fix context size calculation on SNB/IVB/VLV
drm/i915: Print seqnos as unsigned in debugfs
Vinit Azad (1):
drm/i915: Only unmask required PM interrupts
drivers/gpu/drm/Kconfig | 11 +
drivers/gpu/drm/drm_mm.c | 3 +
drivers/gpu/drm/i915/i915_debugfs.c | 65 +++++-
drivers/gpu/drm/i915/i915_dma.c | 28 ++-
drivers/gpu/drm/i915/i915_drv.c | 19 +-
drivers/gpu/drm/i915/i915_drv.h | 98 +++++++-
drivers/gpu/drm/i915/i915_gem.c | 204 +++++++++++-----
drivers/gpu/drm/i915/i915_gem_dmabuf.c | 27 ++-
drivers/gpu/drm/i915/i915_gem_evict.c | 34 +--
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 93 +++++---
drivers/gpu/drm/i915/i915_gem_gtt.c | 13 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 10 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 11 +
drivers/gpu/drm/i915/i915_irq.c | 279 ++++++++++++++++------
drivers/gpu/drm/i915/i915_reg.h | 29 ++-
drivers/gpu/drm/i915/intel_ddi.c | 9 +-
drivers/gpu/drm/i915/intel_display.c | 363 +++++++++++++++++++++--------
drivers/gpu/drm/i915/intel_dp.c | 6 +-
drivers/gpu/drm/i915/intel_drv.h | 14 ++
drivers/gpu/drm/i915/intel_hdmi.c | 2 -
drivers/gpu/drm/i915/intel_i2c.c | 2 +
drivers/gpu/drm/i915/intel_pm.c | 54 +++--
drivers/gpu/drm/i915/intel_ringbuffer.c | 32 +--
drivers/gpu/drm/i915/intel_ringbuffer.h | 11 +-
drivers/gpu/drm/i915/intel_sdvo.c | 3 +-
include/uapi/drm/i915_drm.h | 25 ++
26 files changed, 1060 insertions(+), 385 deletions(-)
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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