[Intel-gfx] [PATCH] [VPG HSW-A] drm/i915:Added HDMI Audio codec disable sequence for HSW.

[mengdong.lin at intel.com]

From: Mukesh <mukeshx.arora at intel.com>

The code implements hsw_hdmi_audio_disable func which sets the
relevant registers for disabling the audio codec in a call to
intel_disable_ddi func.This audio codec disbale sequence is
implemented as per the recommendation of the Bspec.

Change-Id: If6eefbfe5ef821db547c759caa9ff5dc18980738
Signed-off-by: Mukesh Arora <mukeshx.arora at intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 41 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 0de236e..2718d9a 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1119,6 +1119,43 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder)
 	I915_WRITE(PORT_CLK_SEL(port), PORT_CLK_SEL_NONE);
 }
 
+/* Sets the registers for  audio codec disable sequence as
+* mentioned in the Haswell Bspec.
+*/
+void hsw_hdmi_audio_disable(struct drm_encoder *encoder)
+{
+	u32 temp;
+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
+	struct drm_device *dev = encoder->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	int aud_config = HSW_AUD_CFG(intel_crtc->pipe);
+
+	/* HDMI audio disable sequence for Haswell*/
+	if (intel_crtc->eld_vld) {
+		/* disable timestamps */
+		temp = I915_READ(aud_config);
+		/* write 0 for HDMI */
+		temp &= ~AUD_CONFIG_N_VALUE_INDEX;
+		/* Set N_programming_enable */
+		temp |= AUD_CONFIG_N_PROG_ENABLE;
+		/* Set Upper_N_value and Lower_N_value
+		(bits 27:20, 15:4) to all "0"s */
+		temp &= ~(AUD_CONFIG_UPPER_N_VALUE|AUD_CONFIG_LOWER_N_VALUE);
+		I915_WRITE(aud_config, temp);
+		/* Disable ELDV and ELD buffer */
+		temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
+		temp &= ~(AUDIO_ELD_VALID_A << (intel_crtc->pipe * 4));
+		I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, temp);
+		/* Wait for 2 vertical blanks */
+		intel_wait_for_vblank(dev, intel_crtc->pipe);
+		intel_wait_for_vblank(dev, intel_crtc->pipe);
+		/* Disable audio PD. This is optional as per Bspec.  */
+		temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
+		temp &= ~(AUDIO_OUTPUT_ENABLE_A << (intel_crtc->pipe * 4));
+		I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, temp);
+	}
+
+}
 static void intel_enable_ddi(struct intel_encoder *intel_encoder)
 {
 	struct drm_encoder *encoder = &intel_encoder->base;
@@ -1173,6 +1210,10 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder)
 		tmp &= ~((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) <<
 			 (pipe * 4));
 		I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
+		if (IS_HASWELL(dev) && (type == INTEL_OUTPUT_HDMI)) {
+			/*HDMI audio codec disable sequence.	*/
+			hsw_hdmi_audio_disable(encoder);
+		}
 	}
 
 	if (type == INTEL_OUTPUT_EDP) {
-- 
1.8.1.2