[Intel-gfx] [PATCH 2/6] drm/i915: Move num_plane to the intel_device_info structure
Ville Syrjälä
ville.syrjala at linux.intel.com
Thu Dec 12 12:40:32 CET 2013
On Thu, Dec 12, 2013 at 11:20:59AM +0000, Damien Lespiau wrote:
> And rename it to num_planes to match num_pipes.
It should really be num_sprites, or even more accurately
num_sprites_per_pipe but that's a bit of a mouthful.
>
> This limit lives with num_pipes really, and now that dev_priv->info is
> writable we can put it there instead.
>
> While at it, introduce a intel_device_info_runtime_init() where we'll be
> able to gather the device info fields at run-time.
>
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
> ---
> drivers/gpu/drm/i915/i915_dma.c | 21 ++++++++++++++++++---
> drivers/gpu/drm/i915/i915_drv.h | 5 ++---
> drivers/gpu/drm/i915/intel_display.c | 4 ++--
> 3 files changed, 22 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 332d5b6..0f75d5c7 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1459,6 +1459,23 @@ static void i915_dump_device_info(struct drm_i915_private *dev_priv)
> #undef SEP_COMMA
> }
>
> +/*
> + * Determine various intel_device_info fields at runtime.
> + *
> + * Use it when either:
> + * - it's judged too laborious to fill n static structures with the limit
> + * when a simple if statement does the job,
> + * - run-time checks (eg read fuse/strap registers) are needed.
> + */
> +static void intel_device_info_runtime_init(struct drm_device *dev)
> +{
> + struct intel_device_info *info = INTEL_INFO(dev);
> +
> + info->num_planes = 1;
> + if (IS_VALLEYVIEW(dev))
> + info->num_planes = 2;
> +}
It's constant so you could just initialize it in the struct
initialization.
> +
> /**
> * i915_driver_load - setup chip and create an initial config
> * @dev: DRM device
> @@ -1631,9 +1648,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
> if (!IS_I945G(dev) && !IS_I945GM(dev))
> pci_enable_msi(dev->pdev);
>
> - dev_priv->num_plane = 1;
> - if (IS_VALLEYVIEW(dev))
> - dev_priv->num_plane = 2;
> + intel_device_info_runtime_init(dev);
>
> if (INTEL_INFO(dev)->num_pipes) {
> ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6a7844c..704dc7d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -77,7 +77,7 @@ enum plane {
> };
> #define plane_name(p) ((p) + 'A')
>
> -#define sprite_name(p, s) ((p) * dev_priv->num_plane + (s) + 'A')
> +#define sprite_name(p, s) ((p) * INTEL_INFO(dev)->num_planes + (s) + 'A')
>
> enum port {
> PORT_A = 0,
> @@ -503,6 +503,7 @@ struct intel_uncore {
> struct intel_device_info {
> u32 display_mmio_offset;
> u8 num_pipes:3;
> + u8 num_planes:2;
> u8 gen;
> u8 ring_mask; /* Rings supported by the HW */
> DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG, SEP_SEMICOLON);
> @@ -1389,8 +1390,6 @@ typedef struct drm_i915_private {
> u32 hpd_event_bits;
> struct timer_list hotplug_reenable_timer;
>
> - int num_plane;
> -
> struct i915_fbc fbc;
> struct intel_opregion opregion;
> struct intel_vbt_data vbt;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 71876d9..25cbe36 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1189,7 +1189,7 @@ static void assert_sprites_disabled(struct drm_i915_private *dev_priv,
> u32 val;
>
> if (IS_VALLEYVIEW(dev)) {
> - for (i = 0; i < dev_priv->num_plane; i++) {
> + for (i = 0; i < INTEL_INFO(dev)->num_planes; i++) {
> reg = SPCNTR(pipe, i);
> val = I915_READ(reg);
> WARN((val & SP_ENABLE),
> @@ -10862,7 +10862,7 @@ void intel_modeset_init(struct drm_device *dev)
>
> for_each_pipe(i) {
> intel_crtc_init(dev, i);
> - for (j = 0; j < dev_priv->num_plane; j++) {
> + for (j = 0; j < INTEL_INFO(dev)->num_planes; j++) {
> ret = intel_plane_init(dev, i, j);
> if (ret)
> DRM_DEBUG_KMS("pipe %c sprite %c init failed: %d\n",
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
More information about the Intel-gfx
mailing list