[Intel-gfx] [PATCH 6/8] drm/i915: Rework the FBC interval/stall stuff a bit

Daniel Vetter daniel at ffwll.ch
Thu Dec 12 16:03:17 CET 2013


On Thu, Dec 12, 2013 at 04:04:49PM +0200, Imre Deak wrote:
> On Thu, 2013-11-28 at 17:30 +0200, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > Don't touch DPFC_RECOMP_CTL on FBC2, use RMW to update
> > the FBC_CONTROL on FBC1 to make it easier for people to
> > experiment with different numbers. Also fix the interval
> > mask for FBC1.
> 
> As I understood the reason for removing DPFC_RECOMP support is that we
> need to understand better how it affects performance etc. before
> enabling it. That's something for the future.
> 
> We could still zero that register in case BIOS leaves there something
> else but that can be done as a follow-up too. So:
> Reviewed-by: Imre Deak <imre.deak at intel.com>

This patch here doesn't really apply on dinq. Ville, can you pls resend?
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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