[Intel-gfx] [PATCH 2/2] drm/i915/bdw: Implement ff workarounds

[Daniel Vetter]

On Fri, Dec 13, 2013 at 11:09:58AM +0000, Damien Lespiau wrote:
> On Thu, Dec 12, 2013 at 03:28:04PM -0800, Ben Widawsky wrote:
> > WaVSRefCountFullforceMissDisable and
> > WaDSRefCountFullforceMissDisable
> > 
> > VS is a carry-over from HSW, and DS is likely not used by anyone yet.
> > 
> > Cc: Kenneth Graunke <kenneth at whitecape.org>
> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> 
> Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h |  1 +
> >  drivers/gpu/drm/i915/intel_pm.c | 11 ++++++++---
> >  2 files changed, 9 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 3259e83..f1eece4 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -1003,6 +1003,7 @@
> >  
> >  #define GEN7_FF_THREAD_MODE		0x20a0
> >  #define   GEN7_FF_SCHED_MASK		0x0077070
> > +#define   GEN8_FF_DS_REF_CNT_FFME	(1 << 19)
> >  #define   GEN7_FF_TS_SCHED_HS1		(0x5<<16)
> >  #define   GEN7_FF_TS_SCHED_HS0		(0x3<<16)
> >  #define   GEN7_FF_TS_SCHED_LOAD_BALANCE	(0x1<<16)
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 7e2a0e9..424a9d8 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5266,14 +5266,14 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> >  	I915_WRITE(GEN7_HALF_SLICE_CHICKEN1,
> >  		   _MASKED_BIT_ENABLE(GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE));
> >  
> > -	/* WaSwitchSolVfFArbitrationPriority */
> > +	/* WaSwitchSolVfFArbitrationPriority:bdw */
> >  	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
> >  
> > -	/* WaPsrDPAMaskVBlankInSRD */
> > +	/* WaPsrDPAMaskVBlankInSRD:bdw */
> >  	I915_WRITE(CHICKEN_PAR1_1,
> >  		   I915_READ(CHICKEN_PAR1_1) | DPA_MASK_VBLANK_SRD);
> >  
> > -	/* WaPsrDPRSUnmaskVBlankInSRD */
> > +	/* WaPsrDPRSUnmaskVBlankInSRD:bdw */
> >  	for_each_pipe(i) {
> >  		I915_WRITE(CHICKEN_PIPESL_1(i),
> >  			   I915_READ(CHICKEN_PIPESL_1(i) |
> > @@ -5286,6 +5286,11 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> >  	 */
> >  	I915_WRITE(HDC_FORCE_NON_COHERENT,
> >  		   I915_READ(HDC_CHICKEN0) | HDC_FORCE_NON_COHERENT);
> > +
> > +	/* WaVSRefCountFullforceMissDisable:bdw */
> > +	/* WaDSRefCountFullforceMissDisable:bdw */
> > +	I915_WRITE(GEN7_FF_THREAD_MODE,
> > +		   I915_READ(GEN7_FF_THREAD_MODE) & ~(GEN8_FF_DS_REF_CNT_FFME | GEN7_FF_VS_REF_CNT_FFME));

Even with loads of fugde this is too long. I've broken it. Otherwise both
patches applied, thanks.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch