[Intel-gfx] [RFC 12/13] drm/i915: Enabled watchdog timer interrupts

[Lister, Ian]

From ff920051053d564177639a92e50240116e837a48 Mon Sep 17 00:00:00 2001
Message-Id: <ff920051053d564177639a92e50240116e837a48.1387201899.git.ian.lister at intel.com>
In-Reply-To: <cover.1387201899.git.ian.lister at intel.com>
References: <cover.1387201899.git.ian.lister at intel.com>
From: ian-lister <ian.lister at intel.com>
Date: Wed, 11 Dec 2013 10:47:10 +0000
Subject: [RFC 12/13] drm/i915: Enabled watchdog timer interrupts

Enables the counter timeout interrupts for the render and video rings.
The gen6_get_irq/gen6_put_irq functions have been changed to
read-modify-write the IMR so that the watchdog interrupt always
remains enabled.

Signed-off-by: ian-lister <ian.lister at intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 47 ++++++++++++++++++++++++---------
 1 file changed, 35 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2a0091d..9d53bbe 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -579,11 +579,26 @@ err:
 	return ret;
 }
 
+
+static int init_video_ring(struct intel_ring_buffer *ring)
+{
+	struct drm_device *dev = ring->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+
+	int ret = init_ring_common(ring);
+
+	/* Enable the timeout counter for watchdog reset */
+	I915_WRITE_IMR(ring, ~GEN6_BSD_TIMEOUT_COUNTER_EXPIRED);
+
+	return ret;
+}
+
 static int init_render_ring(struct intel_ring_buffer *ring)
 {
 	struct drm_device *dev = ring->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret = init_ring_common(ring);
+	int imr;
 
 	if (INTEL_INFO(dev)->gen > 3)
 		I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH));
@@ -633,8 +648,16 @@ static int init_render_ring(struct intel_ring_buffer *ring)
 	if (INTEL_INFO(dev)->gen >= 6)
 		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
 
+	imr = ~0;
+
+	/* Enable watchdog timeout interrupt */
+	if (INTEL_INFO(dev)->gen >= 7)
+		imr &= ~GEN6_RENDER_TIMEOUT_COUNTER_EXPIRED;
+
 	if (HAS_L3_DPF(dev))
-		I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev));
+		imr &= ~GT_PARITY_ERROR(dev);
+
+	I915_WRITE_IMR(ring, imr);
 
 	return ret;
 }
@@ -1051,18 +1074,17 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring)
 	struct drm_device *dev = ring->dev;
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	unsigned long flags;
+	u32 imr;
 
 	if (!dev->irq_enabled)
 	       return false;
 
 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
 	if (ring->irq_refcount++ == 0) {
-		if (HAS_L3_DPF(dev) && ring->id == RCS)
-			I915_WRITE_IMR(ring,
-				       ~(ring->irq_enable_mask |
-					 GT_PARITY_ERROR(dev)));
-		else
-			I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
+		imr = I915_READ_IMR(ring);
+		imr &= ~ring->irq_enable_mask;
+		I915_WRITE_IMR(ring, imr);
+
 		ilk_enable_gt_irq(dev_priv, ring->irq_enable_mask);
 	}
 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
@@ -1076,13 +1098,14 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring)
 	struct drm_device *dev = ring->dev;
 	drm_i915_private_t *dev_priv = dev->dev_private;
 	unsigned long flags;
+	u32 imr;
 
 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
 	if (--ring->irq_refcount == 0) {
-		if (HAS_L3_DPF(dev) && ring->id == RCS)
-			I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev));
-		else
-			I915_WRITE_IMR(ring, ~0);
+		imr = I915_READ_IMR(ring);
+		imr |= ring->irq_enable_mask;
+		I915_WRITE_IMR(ring, imr);
+
 		ilk_disable_gt_irq(dev_priv, ring->irq_enable_mask);
 	}
 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
@@ -2467,7 +2490,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
 		}
 		ring->dispatch_execbuffer = i965_dispatch_execbuffer;
 	}
-	ring->init = init_ring_common;
+	ring->init = init_video_ring;
 
 	return intel_init_ring_buffer(dev, ring);
 }
-- 
1.8.5.1