[Intel-gfx] [PATCH 11/90] assembler: Remove struct dp_write_gen6 and struct use gen6_dp

Damien Lespiau damien.lespiau at intel.com
Mon Feb 4 16:27:06 CET 2013


We ended up with 2 structures that where exactly the same, so just use
one, which happens to be the one Mesa has.

Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
---
 assembler/brw_structs.h |   13 -------------
 assembler/gram.y        |   16 ++++++++--------
 2 files changed, 8 insertions(+), 21 deletions(-)

diff --git a/assembler/brw_structs.h b/assembler/brw_structs.h
index cfb3028..0e3c430 100644
--- a/assembler/brw_structs.h
+++ b/assembler/brw_structs.h
@@ -1500,19 +1500,6 @@ struct brw_instruction
            GLuint end_of_thread:1;
        } dp_write_gen5;
 
-       struct {
-           GLuint binding_table_index:8;
-           GLuint msg_control:5;
-           GLuint msg_type:4;    
-           GLuint send_commit_msg:1;
-           GLuint pad0:1;
-           GLuint header_present:1;
-           GLuint response_length:5;
-           GLuint msg_length:4;
-           GLuint pad1:2;
-           GLuint end_of_thread:1;
-       } dp_write_gen6;
-
       /**
        * Message for the Sandybridge Render Cache Data Port.
        *
diff --git a/assembler/gram.y b/assembler/gram.y
index 1295d60..538f8f7 100644
--- a/assembler/gram.y
+++ b/assembler/gram.y
@@ -1298,10 +1298,10 @@ msgtarget:	NULL_TOKEN
                        * message header
                        */
                       $$.bits3.generic_gen5.header_present = 1;
-                      $$.bits3.dp_write_gen6.binding_table_index = $3;
-                      $$.bits3.dp_write_gen6.msg_control = $5;
-                     $$.bits3.dp_write_gen6.msg_type = $7;
-                      $$.bits3.dp_write_gen6.send_commit_msg = $9;
+                      $$.bits3.gen6_dp.binding_table_index = $3;
+                      $$.bits3.gen6_dp.msg_control = $5;
+                     $$.bits3.gen6_dp.msg_type = $7;
+                      $$.bits3.gen6_dp.send_commit_msg = $9;
 		  } else if (IS_GENx(5)) {
                       $$.bits2.send_gen5.sfid =
                           BRW_MESSAGE_TARGET_DATAPORT_WRITE;
@@ -1339,10 +1339,10 @@ msgtarget:	NULL_TOKEN
                       $$.bits2.send_gen5.sfid =
                           BRW_MESSAGE_TARGET_DP_RC;
                       $$.bits3.generic_gen5.header_present = ($11 != 0);
-                      $$.bits3.dp_write_gen6.binding_table_index = $3;
-                      $$.bits3.dp_write_gen6.msg_control = $5;
-                     $$.bits3.dp_write_gen6.msg_type = $7;
-                      $$.bits3.dp_write_gen6.send_commit_msg = $9;
+                      $$.bits3.gen6_dp.binding_table_index = $3;
+                      $$.bits3.gen6_dp.msg_control = $5;
+                     $$.bits3.gen6_dp.msg_type = $7;
+                      $$.bits3.gen6_dp.send_commit_msg = $9;
 		  } else if (IS_GENx(5)) {
                       $$.bits2.send_gen5.sfid =
                           BRW_MESSAGE_TARGET_DATAPORT_WRITE;
-- 
1.7.7.5




More information about the Intel-gfx mailing list