[Intel-gfx] [PATCH 44/90] assembler: Replace struct indirect_reg by struct brw_reg
Damien Lespiau
damien.lespiau at intel.com
Mon Feb 4 16:27:39 CET 2013
More code simplification can be layered on top of that (by using some
brw_* helpers to create registers), that'd be for another commit.
Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
---
assembler/gen4asm.h | 8 --------
assembler/gram.y | 46 +++++++++++++++++++++++-----------------------
2 files changed, 23 insertions(+), 31 deletions(-)
diff --git a/assembler/gen4asm.h b/assembler/gen4asm.h
index 122baf0..8a3e95b 100644
--- a/assembler/gen4asm.h
+++ b/assembler/gen4asm.h
@@ -80,14 +80,6 @@ struct regtype {
int type;
int is_default;
};
-/**
- * This structure is the internal representation of register-indirect addressed
- * registers in the parser.
- */
-
-struct indirect_reg {
- int reg_file, address_subreg_nr, indirect_offset;
-};
/**
* This structure is the internal representation of destination operands in the
diff --git a/assembler/gram.y b/assembler/gram.y
index 71dbea9..169026c 100644
--- a/assembler/gram.y
+++ b/assembler/gram.y
@@ -159,7 +159,7 @@ static void brw_program_add_label(struct brw_program *p, const char *label)
struct region region;
struct regtype regtype;
struct brw_reg direct_reg;
- struct indirect_reg indirect_reg;
+ struct brw_reg indirect_reg;
struct condition condition;
struct declared_register symbol_reg;
imm32_t imm32;
@@ -1705,17 +1705,17 @@ dstreg: directgenreg
{
memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
- $$.reg_file = $1.reg_file;
- $$.subreg_nr = $1.address_subreg_nr;
- $$.indirect_offset = $1.indirect_offset;
+ $$.reg_file = $1.file;
+ $$.subreg_nr = $1.subnr;
+ $$.indirect_offset = $1.dw1.bits.indirect_offset;
}
| indirectmsgreg
{
memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
- $$.reg_file = $1.reg_file;
- $$.subreg_nr = $1.address_subreg_nr;
- $$.indirect_offset = $1.indirect_offset;
+ $$.reg_file = $1.file;
+ $$.subreg_nr = $1.subnr;
+ $$.indirect_offset = $1.dw1.bits.indirect_offset;
}
;
@@ -1937,9 +1937,9 @@ indirectsrcoperand:
{
memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
- $$.reg_file = $3.reg_file;
- $$.subreg_nr = $3.address_subreg_nr;
- $$.indirect_offset = $3.indirect_offset;
+ $$.reg_file = $3.file;
+ $$.subreg_nr = $3.subnr;
+ $$.indirect_offset = $3.dw1.bits.indirect_offset;
$$.reg_type = $5.type;
$$.vert_stride = $4.vert_stride;
$$.width = $4.width;
@@ -1966,14 +1966,14 @@ addrparam: addrreg COMMA immaddroffset
YYERROR;
}
memset (&$$, '\0', sizeof ($$));
- $$.address_subreg_nr = $1.subnr;
- $$.indirect_offset = $3;
+ $$.subnr = $1.subnr;
+ $$.dw1.bits.indirect_offset = $3;
}
| addrreg
{
memset (&$$, '\0', sizeof ($$));
- $$.address_subreg_nr = $1.subnr;
- $$.indirect_offset = 0;
+ $$.subnr = $1.subnr;
+ $$.dw1.bits.indirect_offset = 0;
}
;
@@ -2009,9 +2009,9 @@ directgenreg: GENREG subregnum
indirectgenreg: GENREGFILE LSQUARE addrparam RSQUARE
{
memset (&$$, '\0', sizeof ($$));
- $$.reg_file = BRW_GENERAL_REGISTER_FILE;
- $$.address_subreg_nr = $3.address_subreg_nr;
- $$.indirect_offset = $3.indirect_offset;
+ $$.file = BRW_GENERAL_REGISTER_FILE;
+ $$.subnr = $3.subnr;
+ $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset;
}
;
@@ -2027,9 +2027,9 @@ directmsgreg: MSGREG subregnum
indirectmsgreg: MSGREGFILE LSQUARE addrparam RSQUARE
{
memset (&$$, '\0', sizeof ($$));
- $$.reg_file = BRW_MESSAGE_REGISTER_FILE;
- $$.address_subreg_nr = $3.address_subreg_nr;
- $$.indirect_offset = $3.indirect_offset;
+ $$.file = BRW_MESSAGE_REGISTER_FILE;
+ $$.subnr = $3.subnr;
+ $$.dw1.bits.indirect_offset = $3.dw1.bits.indirect_offset;
}
;
@@ -2315,9 +2315,9 @@ relativelocation2:
{
memset (&$$, '\0', sizeof ($$));
$$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
- $$.reg_file = $1.reg_file;
- $$.subreg_nr = $1.address_subreg_nr;
- $$.indirect_offset = $1.indirect_offset;
+ $$.reg_file = $1.file;
+ $$.subreg_nr = $1.subnr;
+ $$.indirect_offset = $1.dw1.bits.indirect_offset;
$$.reg_type = $3.type;
$$.vert_stride = $2.vert_stride;
$$.width = $2.width;
--
1.7.7.5
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