[Intel-gfx] [PATCH 00/36] introduce pipe_config with fdi auto-dithering
Daniel Vetter
daniel.vetter at ffwll.ch
Thu Feb 21 01:49:52 CET 2013
Hi all,
So here it finally is, the pipe_config infrastructure with fdi link bw
constraint required auto-dithering. Like every serious undertaking in modeset
land there seems to be no way to get anywhere in less than 20 patches. Check out
the very last patch for how simply this was to implement, once all the
infrastructure work and tedios code movement was completed.
The reason why we really need this is that on configurations with only 2 fdi
lanes (hsw vga or ivb 3-pipe) we can't even fit a standard 1080p mode in at
24bpp. Which is just plain ridiculous. Works like a charm now.
Another neat little improvement is that we now correctly handle the cpu edp case
for fdi b/c lane sharing. Which means you can use the full edp bandwidth _and_
two 4 lane fdi links if you put the panel onto pipe C.
There's also a bit of fluff to clean up and structure a few things not strictly
required for the fdi auto dither feature: Our usage of private mode flags is
gone, now we have explicit flags. Also, I've started to rework the clock code by
tackling the fixed DP clocks (safe for vlv since I don't have one). But that
part is a bit incomplete insofar as I didn't add any hw state readout and check
code for this yet. Probably better done once we integrate this properly for
fastboot clock handling.
But the big reasons the patch count blew up was that the current high bpc code
looked really broken:
- hdmi only enabled 12bpc when feeding in 12bpc. Which is rather hard to pull
off with the current code ...
- hdmi didn't adjust the port clock correctly for 12bpc mode.
- DP hardcoded a limit of 8bpc in it's link bw code.
- vga actually worked, but who's gonna see more than 8 bpc on an analog output?
Only lightly tested thus far, but I wanted to throw this over the wall before I
disappear for a bit of snowboarding next week.
Oh, and it's not rebased onto latest dinq, so will conflict with Paulo's recent
hdmi/sdvo refactorings.
Cheers, Daniel
Daniel Vetter (36):
drm/i915: introduce struct intel_crtc_config
drm/i915: compute pipe_config earlier
drm/i915: add pipe_config->timings_set
drm/i915: add pipe_config->pixel_multiplier
drm/i915: add pipe_config->has_pch_encoder
drm/i915: clear up the fdi/dp set_m_n confusion
drm/i915: move pipe bpp computation to pipe_config
drm/i915: clean up plane bpp confusion
drm/i915: clean up pipe bpp confusion
drm/i915: move dp_m_n computation to dp_encoder->compute_config
drm/i915: track dp target_clock in pipe_config
drm/i915: rip out superflous is_dp&is_cpu_edp tracking
drm/i915: add hw state readout/checking for pipe_config
drm/i915: hw readout support for ->has_pch_encoders
drm/i915: gen2 has no tv out support
drm/i915: create pipe_config->dpll for clock state
drm/i915: move dp clock computations to encoder->compute_config
drm/i915: add pipe_config->limited_color_range
drm/i915: use pipe_config for lvds dithering
drm/i915: move intel_crtc->fdi_lanes to pipe_config
drm/i915: fixup 12bpc hdmi dotclock handling
drm/i915: hw state readout support for pipe_config->fdi_lanes
drm/i915: split up fdi_set_m_n into computation and hw setup
drm/i915: Disable high-bpc on pre-1.4 EDID screens
drm/i915: force bpp for eDP panels
drm/i915: allow high-bpc modes on DP
drm/i915: extract i9xx_set_pipeconf
drm/i915: drop adjusted_mode from *_set_pipeconf functions
drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv
drm/i915: compute fdi lane config earlier
drm/i915: Split up ironlake_check_fdi_lanes
drm/i915: move fdi lane configuration checks ahead
drm/i915: don't count cpu ports for fdi B/C lane sharing
drm/i915: consolidate pch pll computations a bit
drm/i915: drop haswell fdi lane check from intel_crt_mode_valid
drm/i915: implement fdi auto-dithering
drivers/gpu/drm/i915/i915_drv.h | 9 +-
drivers/gpu/drm/i915/intel_crt.c | 17 +-
drivers/gpu/drm/i915/intel_ddi.c | 33 +-
drivers/gpu/drm/i915/intel_display.c | 1339 +++++++++++++++++-----------------
drivers/gpu/drm/i915/intel_dp.c | 238 +++---
drivers/gpu/drm/i915/intel_drv.h | 111 ++-
drivers/gpu/drm/i915/intel_hdmi.c | 57 +-
drivers/gpu/drm/i915/intel_lvds.c | 47 +-
drivers/gpu/drm/i915/intel_sdvo.c | 50 +-
drivers/gpu/drm/i915/intel_tv.c | 14 +-
10 files changed, 1002 insertions(+), 913 deletions(-)
--
1.7.11.4
More information about the Intel-gfx
mailing list