[Intel-gfx] [PATCH] Intel-gen4asm: let disassembler output flag_reg in conditional modifier

Homer Hsing homer.xing at intel.com
Fri Feb 22 08:45:59 CET 2013


before we change it, disassembler output:
(+f0) cmp.l(8)      null g12<8,8,1>D g2.2<0,1,0>D { align1 };

this is wrong.
even the command is "cmp.l.f1.1", disassembler still output "cmp.l"

after we change it, it is correct:
(+f0) cmp.l.f1.1(8) null g12<8,8,1>D g2.2<0,1,0>D { align1 };
---
 src/disasm.c |   14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/disasm.c b/src/disasm.c
index e52e3d3..0a4e935 100644
--- a/src/disasm.c
+++ b/src/disasm.c
@@ -384,6 +384,13 @@ static int pad (FILE *f, int c)
     return 0;
 }
 
+static int flag_reg (FILE *file, const int flag_nr, const int flag_subreg_nr)
+{
+    if (flag_nr || flag_subreg_nr)
+        return format (file, ".f%d.%d", flag_nr, flag_subreg_nr);
+    return 0;
+}
+
 static int control (FILE *file, char *name, char *ctrl[], GLuint id, int *space)
 {
     if (!ctrl[id]) {
@@ -796,9 +803,14 @@ int disasm (FILE *file, struct brw_instruction *inst)
     err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL);
 
     if (inst->header.opcode != BRW_OPCODE_SEND &&
-	inst->header.opcode != BRW_OPCODE_SENDC)
+	inst->header.opcode != BRW_OPCODE_SENDC) {
 	err |= control (file, "conditional modifier", conditional_modifier,
 			inst->header.sfid_destreg__conditionalmod, NULL);
+	if (inst->header.sfid_destreg__conditionalmod)
+	    err |= flag_reg (file,
+			     inst->bits2.da1.flag_reg_nr,
+			     inst->bits2.da1.flag_subreg_nr);
+    }
 
     if (inst->header.opcode != BRW_OPCODE_NOP) {
 	string (file, "(");
-- 
1.7.10.4




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