[Intel-gfx] [PATCH 07/10] drm/i915: add pipe_config->limited_color_range
Paulo Zanoni
przanoni at gmail.com
Tue Feb 26 18:46:11 CET 2013
Hi
2013/2/21 Daniel Vetter <daniel.vetter at ffwll.ch>:
> Now that we have a useful struct for this, let's use it. Some neat
> pointer-chasing required, but it's all there already.
>
> v2: Rebased on top of the added Haswell limited color range support.
>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
This one looks good, except for the error message produced by checkpatch.pl :)
With that fixed:
Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 13 ++++++-------
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/intel_drv.h | 12 +++++++-----
> drivers/gpu/drm/i915/intel_hdmi.c | 5 +++--
> drivers/gpu/drm/i915/intel_sdvo.c | 5 +++--
> 5 files changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c5f7c6e..a19778c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5131,7 +5131,7 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc,
> else
> val |= PIPECONF_PROGRESSIVE;
>
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> val |= PIPECONF_COLOR_RANGE_SELECT;
> else
> val &= ~PIPECONF_COLOR_RANGE_SELECT;
> @@ -5147,8 +5147,7 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc,
> * is supported, but eventually this should handle various
> * RGB<->YCbCr scenarios as well.
> */
> -static void intel_set_pipe_csc(struct drm_crtc *crtc,
> - const struct drm_display_mode *adjusted_mode)
> +static void intel_set_pipe_csc(struct drm_crtc *crtc)
> {
> struct drm_device *dev = crtc->dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -5163,7 +5162,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc,
> * consideration.
> */
>
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> coeff = ((235 - 16) * (1 << 12) / 255) & 0xff8; /* 0.xxx... */
>
> /*
> @@ -5187,7 +5186,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc,
> if (INTEL_INFO(dev)->gen > 6) {
> uint16_t postoff = 0;
>
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> postoff = (16 * (1 << 13) / 255) & 0x1fff;
>
> I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff);
> @@ -5198,7 +5197,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc,
> } else {
> uint32_t mode = CSC_MODE_YUV_TO_RGB;
>
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> mode |= CSC_BLACK_SCREEN_OFFSET;
>
> I915_WRITE(PIPE_CSC_MODE(pipe), mode);
> @@ -5794,7 +5793,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
>
> haswell_set_pipeconf(crtc, adjusted_mode, dither);
>
> - intel_set_pipe_csc(crtc, adjusted_mode);
> + intel_set_pipe_csc(crtc);
>
> /* Set up the display plane register */
> I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE | DISPPLANE_PIPE_CSC_ENABLE);
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index e851fdd..0f15513 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -739,7 +739,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> }
>
> if (intel_dp->color_range)
> - adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
> + pipe_config->limited_color_range = true;
>
> mode_rate = intel_dp_link_required(adjusted_mode->clock, bpp);
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 458e6bd..61ce435 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -103,11 +103,6 @@
>
> /* drm_display_mode->private_flags */
> #define INTEL_MODE_DP_FORCE_6BPC (0x10)
> -/*
> - * Set when limited 16-235 (as opposed to full 0-255) RGB color range is
> - * to be used.
> - */
> -#define INTEL_MODE_LIMITED_COLOR_RANGE (0x40)
>
> struct intel_framebuffer {
> struct drm_framebuffer base;
> @@ -192,6 +187,13 @@ struct intel_crtc_config {
> /* Whether to set up the PCH/FDI. Note that we never allow sharing
> * between pch encoders and cpu encoders. */
> bool has_pch_encoder;
> +
> + /*
> + * Use reduced/limited/broadcast rbg range, compressing from the full
> + * range fed into the crtcs.
> + */
> + bool limited_color_range;
> +
> /* Used by SDVO (and if we ever fix it, HDMI). */
> unsigned pixel_multiplier;
> };
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index cfc9d751..a8e7104 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -332,6 +332,7 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
> struct drm_display_mode *adjusted_mode)
> {
> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> + struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
> struct dip_infoframe avi_if = {
> .type = DIP_TYPE_AVI,
> .ver = DIP_VERSION_AVI,
> @@ -342,7 +343,7 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
> avi_if.body.avi.YQ_CN_PR |= DIP_AVI_PR_2;
>
> if (intel_hdmi->rgb_quant_range_selectable) {
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
> else
> avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
> @@ -789,7 +790,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
> }
>
> if (intel_hdmi->color_range)
> - adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
> + pipe_config->limited_color_range = true;
>
> if (HAS_PCH_SPLIT(dev) && !IS_HASWELL(dev))
> pipe_config->has_pch_encoder = true;
> diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
> index 7100196..59a6781 100644
> --- a/drivers/gpu/drm/i915/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/intel_sdvo.c
> @@ -956,9 +956,10 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
> .len = DIP_LEN_AVI,
> };
> uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
> + struct intel_crtc *intel_crtc = to_intel_crtc(intel_sdvo->base.base.crtc);
>
> if (intel_sdvo->rgb_quant_range_selectable) {
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
> else
> avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
> @@ -1087,7 +1088,7 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
> }
>
> if (intel_sdvo->color_range)
> - adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
> + pipe_config->limited_color_range = true;
>
> return true;
> }
> --
> 1.7.11.4
>
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--
Paulo Zanoni
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