[Intel-gfx] [PATCH 4/6] drm/i915: HSW PM - removing pcode read/write.

[Paulo Zanoni]

Hi

2013/2/25 Rodrigo Vivi <rodrigo.vivi at gmail.com>:
> Yet according to pm spec pcode read/write operations
> aren't necessary for HSW.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>

Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 26 --------------------------
>  1 file changed, 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 322c562..761be6f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2749,18 +2749,6 @@ static void hsw_enable_rps(struct drm_device *dev)
>                    GEN6_RP_UP_BUSY_AVG |
>                    GEN7_RP_DOWN_IDLE_AVG);
>
> -       ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0);
> -       if (!ret) {
> -               pcu_mbox = 0;
> -               ret = sandybridge_pcode_read(dev_priv, GEN6_READ_OC_PARAMS, &pcu_mbox);
> -               if (ret && pcu_mbox & (1<<31)) { /* OC supported */
> -                       dev_priv->rps.max_delay = pcu_mbox & 0xff;
> -                       DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max to %dMHz\n", pcu_mbox * 50);
> -               }
> -       } else {
> -               DRM_DEBUG_DRIVER("Failed to set the min frequency\n");
> -       }
> -
>         gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
>
>         /* requires MSI enabled */
> @@ -2772,20 +2760,6 @@ static void hsw_enable_rps(struct drm_device *dev)
>         /* enable all PM interrupts */
>         I915_WRITE(GEN6_PMINTRMSK, 0);
>
> -       rc6vids = 0;
> -       ret = sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
> -       if (IS_GEN6(dev) && ret) {
> -               DRM_DEBUG_DRIVER("Couldn't check for BIOS workaround\n");
> -       } else if (IS_GEN6(dev) && (GEN6_DECODE_RC6_VID(rc6vids & 0xff) < 450)) {
> -               DRM_DEBUG_DRIVER("You should update your BIOS. Correcting minimum rc6 voltage (%dmV->%dmV)\n",
> -                         GEN6_DECODE_RC6_VID(rc6vids & 0xff), 450);
> -               rc6vids &= 0xffff00;
> -               rc6vids |= GEN6_ENCODE_RC6_VID(450);
> -               ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_RC6VIDS, rc6vids);
> -               if (ret)
> -                       DRM_ERROR("Couldn't fix incorrect rc6 voltage\n");
> -       }
> -
>         gen6_gt_force_wake_put(dev_priv);
>  }
>
> --
> 1.8.1.2
>
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-- 
Paulo Zanoni