[Intel-gfx] [PATCH 3/8] drm/i915: Added SDP and VSC structures for handling PSR for eDP

[Paulo Zanoni]

Hi

2013/2/25 Rodrigo Vivi <rodrigo.vivi at gmail.com>:
> From: Shobhit Kumar <shobhit.kumar at intel.com>
>
> Signed-off-by: Sateesh Kavuri <sateesh.kavuri at intel.com>
>
> v2: Modified and corrected the structures to be more in line for
> kernel coding guidelines and rebased the code on Paulo's DP patchset
>
> Signed-off-by: Shobhit Kumar <shobhit.kumar at intel.com>
>
> v3: removing unecessary identation at DP_RECEIVER_CAP_SIZE
> v4: moving them to include/drm/drm_dp_helper.h and also already
>     icluding EDP_PSR_RECEIVER_CAP_SIZE to add everything needed
>     for PSR at once at drm_dp_helper.h
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>

I'd group all Signed-off-by tags at the bottom :)

> ---
>  include/drm/drm_dp_helper.h | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index e8e1417..06c5060 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -343,12 +343,34 @@ u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
>                                           int lane);
>
>  #define DP_RECEIVER_CAP_SIZE   0xf
> +#define EDP_PSR_RECEIVER_CAP_SIZE      2

I know I'll sound annoying, but my OCD will kill me if I don't tell
you that the line above uses tab and you use spaces.

> +
>  void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
>  void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
>
>  u8 drm_dp_link_rate_to_bw_code(int link_rate);
>  int drm_dp_bw_code_to_link_rate(u8 link_bw);
>
> +/* SDP header as per eDP 1.3 spec, section 3.6 */
> +struct edp_sdp_header {
> +       u8 id;
> +       u8 type;
> +       u8 revision;
> +       u8 valid_payload_bytes;
> +} __attribute__((packed));

I think Jani's suggestion on the previous review still applies. How
about something like the following?

u8 id;
u8 type;
u8 hb2; /* 7:5 reserved, 4:0 revision number */
u8 hb3; /* 7:5 reserved, 4:0 number of valid data bytes */

And then something like this:
#define EDP_SDP_HEADER_REVISION_MASK 0x1F
#define EDP_SDP_HEADER_VALID_PAYLOAD_BYTES 0x1F

Also, checkpath.pl complains:
WARNING: __packed is preferred over __attribute__((packed))

> +
> +/* SDP VSC header as per eDP 1.3 spec, section 3.6 */
> +struct edp_vsc_psr {
> +       struct edp_sdp_header sdp_header;

Where's DB0? Its description is on DP spec version 1.2, chapter 2.2.5.6

> +       u8 DB1; /* 0 - PSR State; 1 - Update RFB; 2 - CRC Valid*/
> +       u8 DB2; /* CRC value bits 7:0 of the R or Cr component */
> +       u8 DB3; /* CRC value bits 15:8 of the R or Cr component */
> +       u8 DB4; /* CRC value bits 7:0 of the G or Y component */
> +       u8 DB5; /* CRC value bits 15:8 of the G or Y component */
> +       u8 DB6; /* CRC value bits 7:0 of the B or Cb component */
> +       u8 DB7; /* CRC value bits 15:8 of the B or Cb component */
> +} __attribute__((packed));

And here some more defines to access the individual byte fields would
be cool, like:

#define EDP_VSC_PSR_STATE_ACTIVE 1
#define EDP_VSC_PSR_RFB_UPDATE (1 << 1)
etc.

> +
>  static inline int
>  drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE])
>  {
> --
> 1.8.1.2
>
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-- 
Paulo Zanoni