[Intel-gfx] [PATCH v2 0/7] drm/i915: fix gtt space allocated for tiled objects

[Imre Deak]

At the moment it's possible for user space to allocate a tiled buffer
with a size not aligned to its tile row size and corrupt a buffer that
follows this in the gtt space. More details on this in the last patch.

I'll also send a v2 i-g-t test case for this.

Tested on Gen5,6.

In v2:
- Instead of always overallocating for unaligned objects, limit the
  linear size - and overallocate only when necessary for POT fence
  sizes. Discussed this with Chris Wilson.
- Force a rebind if the GTT size changes after a tiling change. (Chris
  Wilson)
- Reject tiling if the object size is smaller than the tile row size.

Imre Deak (7):
  drm/i915: merge get_gtt_alignment/get_unfenced_gtt_alignment()
  drm/i915: merge {i965,sandybridge}_write_fence_reg()
  drm/i915: use gtt_get_size() instead of open coding it
  drm/i915: factor out i915_gem_get_tile_width()
  drm/i915: reject tiling for objects smaller than their tile row size
  drm/i915: check tile object alignment explicitly
  drm/i915: fix gtt space allocated for tiled objects

 drivers/gpu/drm/i915/i915_drv.h        |   13 ++-
 drivers/gpu/drm/i915/i915_gem.c        |  183 ++++++++++++++++++--------------
 drivers/gpu/drm/i915/i915_gem_tiling.c |   48 ++++-----
 3 files changed, 138 insertions(+), 106 deletions(-)

-- 
1.7.10.4