[Intel-gfx] [PATCH 9/9] drm/i915: Don't touch VGA0/VGA1/VGA_PD on ILK+

[ville.syrjala at linux.intel.com]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

VGA0/VGA1/VGA_PD registers apparently haven't existed since Gen4.
Don't touch them on more recent platforms.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_suspend.c | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 359ca24..75d981a 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -70,9 +70,11 @@ static void i915_save_vga(struct drm_device *dev)
 	u16 cr_index, cr_data, st01;
 
 	/* VGA state */
-	dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
-	dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
-	dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);
+	if (INTEL_INFO(dev)->gen <= 4) {
+		dev_priv->regfile.saveVGA0 = I915_READ(VGA0);
+		dev_priv->regfile.saveVGA1 = I915_READ(VGA1);
+		dev_priv->regfile.saveVGA_PD = I915_READ(VGA_PD);
+	}
 	dev_priv->regfile.saveVGACNTRL = I915_READ(i915_vgacntrl_reg(dev));
 
 	/* VGA color palette registers */
@@ -136,11 +138,13 @@ static void i915_restore_vga(struct drm_device *dev)
 	/* VGA state */
 	I915_WRITE(i915_vgacntrl_reg(dev), dev_priv->regfile.saveVGACNTRL);
 
-	I915_WRITE(VGA0, dev_priv->regfile.saveVGA0);
-	I915_WRITE(VGA1, dev_priv->regfile.saveVGA1);
-	I915_WRITE(VGA_PD, dev_priv->regfile.saveVGA_PD);
-	POSTING_READ(VGA_PD);
-	udelay(150);
+	if (INTEL_INFO(dev)->gen <= 4) {
+		I915_WRITE(VGA0, dev_priv->regfile.saveVGA0);
+		I915_WRITE(VGA1, dev_priv->regfile.saveVGA1);
+		I915_WRITE(VGA_PD, dev_priv->regfile.saveVGA_PD);
+		POSTING_READ(VGA_PD);
+		udelay(150);
+	}
 
 	/* MSR bits */
 	I915_WRITE8(VGA_MSR_WRITE, dev_priv->regfile.saveMSR);
-- 
1.7.12.4