[Intel-gfx] [PATCH 4/7] drm/i915: check for unclaimed registers on I915_READ too
Paulo Zanoni
przanoni at gmail.com
Fri Jan 25 21:57:39 CET 2013
From: Paulo Zanoni <paulo.r.zanoni at intel.com>
This will transform a few "Unclaimed register before XXX" into the
more precise version "Unclaimed register YYY (R)", where YYY is the
droid we're looking for, not XXX.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f47de4d..422dfc6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1224,17 +1224,17 @@ ilk_dummy_write(struct drm_i915_private *dev_priv)
I915_WRITE_NOTRACE(MI_MODE, 0);
}
-#define UNCLAIMED_REG_CLEAR(dev_priv, reg) \
+#define UNCLAIMED_REG_CLEAR(dev_priv, reg, op) \
if (IS_HASWELL(dev_priv->dev) && \
(I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) { \
- DRM_ERROR("Unknown unclaimed register before writing to %x\n", reg); \
+ DRM_ERROR("Unclaimed register before %x (%c)\n", reg, op); \
I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM); \
}
-#define UNCLAIMED_REG_CHECK(dev_priv, reg) \
+#define UNCLAIMED_REG_CHECK(dev_priv, reg, op) \
if (IS_HASWELL(dev_priv->dev) && \
(I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) { \
- DRM_ERROR("Unclaimed write to %x\n", reg); \
+ DRM_ERROR("Unclaimed register %x (%c)\n", reg, op); \
I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM); \
}
@@ -1243,6 +1243,7 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
u##x val = 0; \
if (IS_GEN5(dev_priv->dev)) \
ilk_dummy_write(dev_priv); \
+ UNCLAIMED_REG_CLEAR(dev_priv, reg, 'R'); \
if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
unsigned long irqflags; \
spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \
@@ -1257,6 +1258,7 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
} else { \
val = read##y(dev_priv->regs + reg); \
} \
+ UNCLAIMED_REG_CHECK(dev_priv, reg, 'R'); \
trace_i915_reg_rw(false, reg, val, sizeof(val)); \
return val; \
}
@@ -1276,7 +1278,7 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
} \
if (IS_GEN5(dev_priv->dev)) \
ilk_dummy_write(dev_priv); \
- UNCLAIMED_REG_CLEAR(dev_priv, reg); \
+ UNCLAIMED_REG_CLEAR(dev_priv, reg, 'W'); \
if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
write##y(val, dev_priv->regs + reg + 0x180000); \
} else { \
@@ -1285,7 +1287,7 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
if (unlikely(__fifo_ret)) { \
gen6_gt_check_fifodbg(dev_priv); \
} \
- UNCLAIMED_REG_CHECK(dev_priv, reg); \
+ UNCLAIMED_REG_CHECK(dev_priv, reg, 'W'); \
}
__i915_write(8, b)
__i915_write(16, w)
--
1.7.10.4
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