[Intel-gfx] [PATCH] drm/i915: Enable/Disable PSR
Daniel Vetter
daniel at ffwll.ch
Sat Jul 6 00:14:20 CEST 2013
On Fri, Jul 5, 2013 at 11:58 PM, Paulo Zanoni <przanoni at gmail.com> wrote:
>>> My interpretation of the spec is that we need to wait until exactly
>>> after the VSync so we don't send incomplete packets, but we don't have
>>> a good way to do this, and intel_wait_for_vblank doesn't help us with
>>> that. If you take a look at the HDMI code you'll notice that we set
>>> the video DIP registers inside intel_hdmi_mode_set, because at that
>>> point the pipe is stopped and we don't need to worry about waiting for
>>> the exact vblank period. Perhaps we should do the same here: load the
>>> contents of the video dip registers at mode_set time? Is there any
>>> problem in keeping those values there even when PSR or the pipe is
>>> disabled?
>>
>>
>> By moving it to mode_set time I started to get some other bugs when
>> exiting PSR state.
>> Also on mode_set time you don't know if psr will be enabled or not and
>> maybe writting this vsc will be useless.
>> I understand vblank is not ideal, but it works and since we don't have
>> a wait_for_vsync implemented I prefer to stay with this version that
>> works.
>
> What if we just remove the wait_for_vblank line since it doesn't
> really seem to help us and may make us skip a few frames? The best
> thing is probably to write the wait_for_vsync function anyway.
Chris and Ville are both working on vblank_work and vblank_tasklets
that are fired off from the interrupt handler at vblank time. Those
could be rather useful, and I expect that we'll use them a _lot_ to
avoid many of the wait_vblanks we currently have towards the end of
our modeset sequence (e.g. for fbc, ips, infoframes if we start to set
them when the pipe is life, which we kinda have to for fastboot ...).
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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