[Intel-gfx] [PATCH v2] drm/i915: fix lane bandwidth capping for DP 1.2 sinks

[Daniel Vetter]

On Tue, Jul 09, 2013 at 05:05:26PM +0300, Imre Deak wrote:
> DP 1.2 compatible displays may report a 5.4Gbps maximum bandwidth which
> the driver will treat as an invalid value and use 1.62Gbps instead. Fix
> this by capping to 2.7Gbps for sinks reporting a 5.4Gbps max bw.
> 
> Also add a warning for reserved values.
> 
> v2:
> - allow only bw values explicitly listed in the DP standard (Daniel,
>   Chris)
> 
> Signed-off-by: Imre Deak <imre.deak at intel.com>

lgtm. Picked up for -fixes, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch