[Intel-gfx] [PATCH 1/2] drm/i915: clean up media reset on gm45

[Daniel Vetter]

On Tue, Jul 09, 2013 at 02:56:01PM +0100, Chris Wilson wrote:
> On Tue, Jul 09, 2013 at 02:44:26PM +0200, Daniel Vetter wrote:
> > Originally I've thought that this fixes up the reset issues on my
> > gm45, but that was just a red herring due to b0rked testing.
> > 
> > Still I much prefer writing the right values (all other fields are
> > reserved) instead of potentially dragging gunk around. Hence also
> > clear the register to 0 after a reset.
> > 
> > Note that Cspec is a bit confused and doesn't explicitly say that all
> > the other bits in this register are "reserved, mbz" like usually.
> > Instead they're marked as "r/o, default value = 0" which semantically
> > amounts to the same thing.
> > 
> > v2: Stop claiming this fixes anything and return 0 if successful
> > instead of stack garbage.
> > 
> > v3: Pimp the commit message to explain exactly why I think the docs
> > allow us to ditch the rmw cycle, spurred by a discussion with Chris.
> > 
> > Cc: Chris Wilson <chris at chris-wilson.co.uk>
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> Bugzilla?

I've dropped the bugzilla ref since at most this is Inspired-by: which is
a bit a useless tag. The bug itself was the lack of hw status page reinit,
which is clearly a completely different issue.

> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

Queued for -next, thanks for the review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch