[Intel-gfx] [PATCH 7/9] drm/i915: Use only the default context for ILK

[Ben Widawsky]

The ILK renderctx predates the generic i915 context code. With the
patches before this, I believe I have properly eased the transition to
simply using the regular default context instead of the special
renderctx.

This untangles the weirdness from the last commit, and finishes the
transition.

The powerctx is still needed since that is a special ILK only thing. VLV
has a similar funkiness, so we could probably try to join those two, but
I see no point.

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_debugfs.c     |  6 -----
 drivers/gpu/drm/i915/i915_drv.h         |  2 --
 drivers/gpu/drm/i915/i915_gem_context.c |  5 -----
 drivers/gpu/drm/i915/intel_pm.c         | 40 ---------------------------------
 4 files changed, 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 5e88ef6..4812493 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1347,12 +1347,6 @@ static int i915_context_status(struct seq_file *m, void *unused)
 		seq_putc(m, '\n');
 	}
 
-	if (dev_priv->ips.renderctx.obj) {
-		seq_puts(m, "render context ");
-		describe_obj(m, dev_priv->ips.renderctx.obj);
-		seq_putc(m, '\n');
-	}
-
 	for_each_ring(ring, dev_priv, i) {
 		if (ring->default_context) {
 			seq_printf(m, "HW default context %s ring ", ring->name);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 499caac..23f14d7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -789,7 +789,6 @@ struct intel_ilk_power_mgmt {
 	int r_t;
 
 	struct drm_i915_gem_object *pwrctx;
-	struct i915_hw_context renderctx;
 };
 
 /* Power well structure for haswell */
@@ -1866,7 +1865,6 @@ int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
 				  struct drm_file *file);
 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
 				   struct drm_file *file);
-int ironlake_setup_rc6_hw_context(struct drm_i915_private *dev_priv);
 
 /* i915_gem_gtt.c */
 void i915_gem_cleanup_aliasing_ppgtt(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 5d10b37..6556f3d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -595,8 +595,3 @@ int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
 	DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
 	return 0;
 }
-
-int ironlake_setup_rc6_hw_context(struct drm_i915_private *dev_priv)
-{
-	return do_switch(&dev_priv->ips.renderctx);
-}
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fd91b74..21e61fc 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3615,12 +3615,6 @@ void ironlake_teardown_rc6(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (dev_priv->ips.renderctx.obj) {
-		i915_gem_object_unpin(dev_priv->ips.renderctx.obj);
-		drm_gem_object_unreference(&dev_priv->ips.renderctx.obj->base);
-		dev_priv->ips.renderctx.obj = NULL;
-	}
-
 	if (dev_priv->ips.pwrctx) {
 		i915_gem_object_unpin(dev_priv->ips.pwrctx);
 		drm_gem_object_unreference(&dev_priv->ips.pwrctx->base);
@@ -3650,15 +3644,6 @@ static int ironlake_setup_rc6(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (dev_priv->ips.renderctx.obj == NULL)
-		dev_priv->ips.renderctx.obj = intel_alloc_context_page(dev);
-	if (!dev_priv->ips.renderctx.obj)
-		return -ENOMEM;
-	else {
-		dev_priv->ips.renderctx.id = DEFAULT_CONTEXT_ID;
-		dev_priv->ips.renderctx.ring = &dev_priv->ring[RCS];
-	}
-
 	if (dev_priv->ips.pwrctx == NULL)
 		dev_priv->ips.pwrctx = intel_alloc_context_page(dev);
 	if (!dev_priv->ips.pwrctx) {
@@ -3672,8 +3657,6 @@ static int ironlake_setup_rc6(struct drm_device *dev)
 static void ironlake_enable_rc6(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_ring_buffer *ring = &dev_priv->ring[RCS];
-	bool was_interruptible;
 	int ret;
 
 	/* rc6 disabled by default due to repeated reports of hanging during
@@ -3688,29 +3671,6 @@ static void ironlake_enable_rc6(struct drm_device *dev)
 	if (ret)
 		return;
 
-	was_interruptible = dev_priv->mm.interruptible;
-	dev_priv->mm.interruptible = false;
-
-	ret = ironlake_setup_rc6_hw_context(dev_priv);
-	if (ret) {
-		ironlake_teardown_rc6(dev);
-		dev_priv->mm.interruptible = was_interruptible;
-		return;
-	}
-
-	/*
-	 * Wait for the command parser to advance past MI_SET_CONTEXT. The HW
-	 * does an implicit flush, combined with MI_FLUSH above, it should be
-	 * safe to assume that renderctx is valid
-	 */
-	ret = intel_ring_idle(ring);
-	dev_priv->mm.interruptible = was_interruptible;
-	if (ret) {
-		DRM_ERROR("failed to enable ironlake power savings\n");
-		ironlake_teardown_rc6(dev);
-		return;
-	}
-
 	I915_WRITE(PWRCTXA, i915_gem_obj_ggtt_offset(dev_priv->ips.pwrctx) | PWRCTX_EN);
 	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
 }
-- 
1.8.3.2