[Intel-gfx] [PATCH] i965: Gen5: Use HW contexts on Ironlake

[Ben Widawsky]

NOTE: The error messages might need updating if the patches don't make
3.11.

NOTE2: I'm not sure if mesa devs want to make HW contexts a hard
requirement on GEN5, as it is on GEN6+. I think letting the patches soak
for a few releases first, won't be a bad idea.

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
---
 src/mesa/drivers/dri/i965/brw_context.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index a72e226..4a0a6ad 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -311,7 +311,7 @@ brwCreateContext(int api,
    /* Reinitialize the context point state.  It depends on ctx->Const values. */
    _mesa_init_point(ctx);
 
-   if (brw->gen >= 6) {
+   if (brw->gen >= 5) {
       /* Create a new hardware context.  Using a hardware context means that
        * our GPU state will be saved/restored on context switch, allowing us
        * to assume that the GPU is in the same state we left it in.
@@ -322,7 +322,10 @@ brwCreateContext(int api,
       brw->hw_ctx = drm_intel_gem_context_create(brw->bufmgr);
 
       if (!brw->hw_ctx) {
-         fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
+	 if (brw->gen == 5)
+	    fprintf(stderr, "Gen5 requires Kernel 3.11 or later.\n");
+	 else
+	    fprintf(stderr, "Gen6+ requires Kernel 3.6 or later.\n");
          ralloc_free(brw);
          return false;
       }
-- 
1.8.3.2