[Intel-gfx] [PATCH 4/6] drm/i915: Serialize all register access
Ben Widawsky
ben at bwidawsk.net
Tue Jul 16 05:20:07 CEST 2013
On Fri, Jul 12, 2013 at 09:52:46PM +0100, Chris Wilson wrote:
> On Fri, Jul 12, 2013 at 01:37:28PM -0700, Ben Widawsky wrote:
> > On Fri, Jul 12, 2013 at 03:02:34PM +0100, Chris Wilson wrote:
> > > In theory, the different register blocks were meant to be only ever
> > > touched when holding either the struct_mutex, mode_config.lock or even a
> > > specific localised lock. This does not seem to be the case, and the
> > > hardware reacts extremely badly if we attempt to concurrently access two
> > > registers within the same cacheline.
> > >
> > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=63914
> > > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> >
> > You are crossing the point of no return here for doing this only on HSW
> > where the bug is known to exist. As you are the resident performance
> > curmudgeon I'll defer to you if that's okay or not... just pointing it
> > out.
>
> I looked at all the extra checks we are doing in addition to just
> reading/writing the register and thought it would be better to close any
> races there. Hence why I think this is a correctness fix above and
> beyond the hsw issue.
> -Chris
>
> --
> Chris Wilson, Intel Open Source Technology Centre
Oh, one more thing on this patch... can you please add a Wa comment
marker in the code. I don't have a name for this wa, but if you can't
find anything in the wa database, just call it whatever you feel like,
so long as the tool will pick it up.
--
Ben Widawsky, Intel Open Source Technology Center
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