[Intel-gfx] [PATCH] drm/i915: fix hdmi portclock limits

[Damien Lespiau]

On Mon, Jul 22, 2013 at 06:02:39PM +0200, Daniel Vetter wrote:
> In
> 
> commit 325b9d048810f7689ec644595061c0b700e64bce
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date:   Fri Apr 19 11:24:33 2013 +0200
> 
>     drm/i915: fixup 12bpc hdmi dotclock handling
> 
> I've errornously claimed that we don't yet support the hdmi 1.4
> dotclocks > 225 MHz on Haswell. But a bug report and a closer look at
> the wrpll table showed that we've supported port clocks up to 300MHz.
> 
> With the new code to dynamically compute wrpll limits we should have
> no issues going up to the full 340 MHz range of hdmi 1.4, so let's
> just use that to fix this regression. That'll allow 4k over hdmi for
> free!
> 
> v2: Drop the random hunk that somehow slipped in.
> 
> v3: Cantiga has the original HDMI dotclock limit of 165MHz. And also
> patch up the mode filtering. To do so extract the dotclock limits into
> a little helper function.
> 
> v4: Use 300MHz (from Bspec) instead of 340MHz (upper limit for hdmi
> 1.3), apparently hw is not required to be able to drive the highest
> dotclocks. Suggested by Damien.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67048
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67030
> Tested-by: Andreas Reis <andreas.reis at gmail.com> (v2)
> Cc: Damien Lespiau <damien.lespiau at intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>

-- 
Damien

> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 19 ++++++++++++++++---
>  1 file changed, 16 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 98df2a0..2fd3fd5 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -785,10 +785,22 @@ static void intel_disable_hdmi(struct intel_encoder *encoder)
>  	}
>  }
>  
> +static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
> +{
> +	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
> +
> +	if (IS_G4X(dev))
> +		return 165000;
> +	else if (IS_HASWELL(dev))
> +		return 300000;
> +	else
> +		return 225000;
> +}
> +
>  static int intel_hdmi_mode_valid(struct drm_connector *connector,
>  				 struct drm_display_mode *mode)
>  {
> -	if (mode->clock > 165000)
> +	if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector)))
>  		return MODE_CLOCK_HIGH;
>  	if (mode->clock < 20000)
>  		return MODE_CLOCK_LOW;
> @@ -806,6 +818,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
>  	struct drm_device *dev = encoder->base.dev;
>  	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
>  	int clock_12bpc = pipe_config->requested_mode.clock * 3 / 2;
> +	int portclock_limit = hdmi_portclock_limit(intel_hdmi);
>  	int desired_bpp;
>  
>  	if (intel_hdmi->color_range_auto) {
> @@ -829,7 +842,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
>  	 * outputs. We also need to check that the higher clock still fits
>  	 * within limits.
>  	 */
> -	if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= 225000
> +	if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= portclock_limit
>  	    && HAS_PCH_SPLIT(dev)) {
>  		DRM_DEBUG_KMS("picking bpc to 12 for HDMI output\n");
>  		desired_bpp = 12*3;
> @@ -846,7 +859,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
>  		pipe_config->pipe_bpp = desired_bpp;
>  	}
>  
> -	if (adjusted_mode->clock > 225000) {
> +	if (adjusted_mode->clock > portclock_limit) {
>  		DRM_DEBUG_KMS("too high HDMI clock, rejecting mode\n");
>  		return false;
>  	}
> -- 
> 1.8.3.2
>