[Intel-gfx] [PATCH 06/15] drm/i915: use INTEL_IRQ_REG_INIT on VLV too

[Paulo Zanoni]

From: Paulo Zanoni <paulo.r.zanoni at intel.com>

This is a case where the code written doesn't match INTEL_IRQ_REG_INIT
perfectly. Call it after clearing PIPESTAT so we make sure that it is
cleared while the interrupts are disabled.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index e416848..37420b5 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2236,12 +2236,9 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
 	I915_WRITE(PORT_HOTPLUG_EN, 0);
 	POSTING_READ(PORT_HOTPLUG_EN);
 
-	I915_WRITE(VLV_IMR, dev_priv->irq_mask);
-	I915_WRITE(VLV_IER, enable_mask);
-	I915_WRITE(VLV_IIR, 0xffffffff);
 	I915_WRITE(PIPESTAT(0), 0xffff);
 	I915_WRITE(PIPESTAT(1), 0xffff);
-	POSTING_READ(VLV_IER);
+	INTEL_IRQ_REG_INIT(VLV_I, true, enable_mask, dev_priv->irq_mask);
 
 	/* Interrupt setup is already guaranteed to be single-threaded, this is
 	 * just to make the assert_spin_locked check happy. */
-- 
1.8.1.2