[Intel-gfx] [PATCH 14/15] drm/i915: reset the i8xx IIR registers at preinstall

[Paulo Zanoni]

From: Paulo Zanoni <paulo.r.zanoni at intel.com>

Same thing as the equivalent commit that touched INTEL_IRQ_REG_RESET.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index d32042d..4f0bc26 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -79,16 +79,13 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
 	[HPD_PORT_D] = PORTD_HOTPLUG_INT_STATUS
 };
 
-#define INTEL_IRQ_REG_RESET16(type, do_iir) do { \
+#define INTEL_IRQ_REG_RESET16(type) do { \
 	I915_WRITE16(type##MR, 0xffff); \
 	I915_WRITE16(type##ER, 0); \
-	POSTING_READ16(type##ER); \
-	if (do_iir) { \
+	I915_WRITE16(type##IR, 0xffff); \
+	if (I915_READ16(type##IR)) { \
 		I915_WRITE16(type##IR, 0xffff); \
-		if (I915_READ16(type##IR)) { \
-			I915_WRITE16(type##IR, 0xffff); \
-			POSTING_READ16(type##IR); \
-		} \
+		POSTING_READ16(type##IR); \
 	} \
 } while (0)
 
@@ -2329,7 +2326,7 @@ static void i8xx_irq_preinstall(struct drm_device * dev)
 
 	for_each_pipe(pipe)
 		I915_WRITE(PIPESTAT(pipe), 0);
-	INTEL_IRQ_REG_RESET16(I, false);
+	INTEL_IRQ_REG_RESET16(I);
 }
 
 static int i8xx_irq_postinstall(struct drm_device *dev)
@@ -2465,7 +2462,7 @@ static void i8xx_irq_uninstall(struct drm_device * dev)
 		I915_WRITE(PIPESTAT(pipe), 0);
 		I915_WRITE(PIPESTAT(pipe), I915_READ(PIPESTAT(pipe)));
 	}
-	INTEL_IRQ_REG_RESET16(I, true);
+	INTEL_IRQ_REG_RESET16(I);
 }
 
 static void i915_irq_preinstall(struct drm_device * dev)
-- 
1.8.1.2