[Intel-gfx] [PATCH 6/6] drm/i915: Convert the register access tracepoint to be conditional

[Daniel Vetter]

On Fri, Jul 19, 2013 at 08:36:56PM +0100, Chris Wilson wrote:
> The TRACE_EVENT_CONDITION is supposed to generate more efficient code
> than if (cond) trace(), which is what we are currently using inside the
> register access functions.
> 
> v2: Rebase onto uncore
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

Ok, merged the remaining patches in this series. The "move functions
around" one need a bit of wrestling to fit, but I think I've done it
correctly.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
>  drivers/gpu/drm/i915/i915_trace.h   | 8 +++++---
>  drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
>  3 files changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 0513743..cc3e74a 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1004,7 +1004,7 @@ static int gen6_drpc_info(struct seq_file *m)
>  	}
>  
>  	gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
> -	trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
> +	trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4, true);
>  
>  	rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
>  	rcctl1 = I915_READ(GEN6_RC_CONTROL);
> diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
> index 7d283b5..2933e2f 100644
> --- a/drivers/gpu/drm/i915/i915_trace.h
> +++ b/drivers/gpu/drm/i915/i915_trace.h
> @@ -406,10 +406,12 @@ TRACE_EVENT(i915_flip_complete,
>  	    TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj)
>  );
>  
> -TRACE_EVENT(i915_reg_rw,
> -	TP_PROTO(bool write, u32 reg, u64 val, int len),
> +TRACE_EVENT_CONDITION(i915_reg_rw,
> +	TP_PROTO(bool write, u32 reg, u64 val, int len, bool trace),
>  
> -	TP_ARGS(write, reg, val, len),
> +	TP_ARGS(write, reg, val, len, trace),
> +
> +	TP_CONDITION(trace),
>  
>  	TP_STRUCT__entry(
>  		__field(u64, val)
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2c39467..b2703db 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -361,7 +361,7 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg, bool trace) { \
>  		val = __raw_i915_read##x(dev_priv, reg); \
>  	} \
>  	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
> -	if (trace) trace_i915_reg_rw(false, reg, val, sizeof(val)); \
> +	trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
>  	return val; \
>  }
>  
> @@ -375,7 +375,7 @@ __i915_read(64)
>  void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val, bool trace) { \
>  	unsigned long irqflags; \
>  	u32 __fifo_ret = 0; \
> -	if (trace) trace_i915_reg_rw(true, reg, val, sizeof(val)); \
> +	trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
>  	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
>  	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
>  		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
> -- 
> 1.8.3.2
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch