[Intel-gfx] [PATCH 2/2] drm/i915: fix EDID/sink-based bpp clamping

[Chris Wilson]

On Sun, Jun 02, 2013 at 01:26:24PM +0200, Daniel Vetter wrote:
> Since this is run in the compute config stage we need to check
> the new_ pointers, i.e the stage output routing, not the current
> modeset layout. Also there was a little logic bug in properly skipping
> connectors: The old code did not skip any unused connectors and so
> clamped to whatever was left in there (usually 0 if that connector
> hasn't seen a EDID 1.4 screen ever since boot-up).
> 
> This has been broken when moving the pipe bpp selection in
> 
> commit 4e53c2e010e531b4a014692199e978482d471c7e
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date:   Wed Mar 27 00:44:58 2013 +0100
> 
>     drm/i915: precompute pipe bpp before touching the hw
> 
> To avoid too much casting switch from drm_ to intel_ types.
> 
> Also add a bit of debug output to help reconstructing what's going
> on.
> 
> v2: Try to clarify this a bit:
> - s/pipe_config_set_bpp/compute_baseline_pipe_bpp/ to make it clearer
>   at which stage this function is run. Also add a comment about what
>   it does.
> - Extract the sink clamping into it's own function.
> 
> v3: Actually make it compile.
> 
> v4: Split out all the prep refactoring to make the bugfix stick out
> really badly. Also elaborate a bit in the commit message about the
> nature of the bugfix.
> 
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>

Yes, that does show how badly I misread the first patch!
For both, Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre