[Intel-gfx] [PATCH] drm/i915: pipe config quirk infrastructure plus sdvo mode.flags fix

Daniel Vetter daniel at ffwll.ch
Thu Jun 6 22:36:06 CEST 2013


On Thu, Jun 06, 2013 at 02:51:37PM +0100, Chris Wilson wrote:
> On Thu, Jun 06, 2013 at 02:55:52PM +0200, Daniel Vetter wrote:
> > For various reasons the hw state readout might not be able to
> > faithfully match the hw state:
> > - broken hw (like the case which motivated this patch here where the
> >   sdvo encoder does not implemented mandatory functionality
> >   correctly).
> > - platforms which are not supported fully with the pipe config
> >   infrastructure
> > - if our code doesn't support a given hw configuration natively, e.g.
> >   special restrictions on the per-pipe panel fitters when they're used
> >   in high-quality scaling modes.
> > 
> > In all these cases both fastboot and the hw state cross checker need
> > to be aware of these cases and act accordingly. To be able to do this
> > add a new quirk flag to the pipe config structure.
> > 
> > The specific case at hand is an sdvo encoder which doesn't implement
> > the get_timings function, so adjusted_mode flags will be wrong. The
> > strange thing though is that the encoder _does_ work, even though it
> > doesn't implement any of the timings functions (so neither get nor
> > set, neither for input nor output timings).
> > 
> > Not that non-compliant sdvo encoder are any surprise at all ...
> > 
> > v2:
> > - Don't read random garbage from the dtd if the get_timings call
> >   failed (suggested by Chris).
> > - Still check the interlaced flag, that's read out from someplace
> >   else. We want maximal paranoia, after all.
> > 
> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
Queued for -next, thanks for the review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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