[Intel-gfx] [PATCH 2/2] drm/i915: enable 30bpp for DP outputs
Daniel Vetter
daniel at ffwll.ch
Fri Jun 7 07:51:10 CEST 2013
On Sat, Jun 01, 2013 at 07:45:56PM +0200, Daniel Vetter wrote:
> We always limited the link bw calculations to 24bpp. Tested with
> my shiny new high-bpc screen, seems to work as advertised.
>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65280
Tested-by: shui yangwei <yangweix.shui at intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index c92eeeb..9868600 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -704,7 +704,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>
> /* Walk through all bpp values. Luckily they're all nicely spaced with 2
> * bpc in between. */
> - bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
> + bpp = pipe_config->pipe_bpp;
> if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
> bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);
>
> --
> 1.7.11.7
>
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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