[Intel-gfx] [PATCH 03/31] drm/i915: lock down pch pll accouting some more

[Ville Syrjälä]

On Wed, Jun 05, 2013 at 01:34:05PM +0200, Daniel Vetter wrote:
> Before I start to make a complete mess out of this, crank up
> the paranoia level a bit.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 56fb6ed..39e977f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1440,6 +1440,7 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
>  	}
>  
>  	assert_pch_pll_enabled(dev_priv, pll, NULL);
> +	WARN_ON(!pll->on);
>  	if (--pll->active)
>  		return;

Maybe a WARN_ON(pll->on) near the end of ironlake_enable_pch_pll() too?

>  
> @@ -3031,12 +3032,18 @@ static void intel_put_pch_pll(struct intel_crtc *intel_crtc)
>  	if (pll == NULL)
>  		return;
>  
> +	WARN_ON(!intel_crtc->config.has_pch_encoder);

Doesn't that trigger if we switch directly from PCH to CPU eDP?

> +
>  	if (pll->refcount == 0) {
>  		WARN(1, "bad PCH PLL refcount\n");
>  		return;
>  	}
>  
> -	--pll->refcount;
> +	if (--pll->refcount == 0) {
> +		WARN_ON(pll->on);
> +		WARN_ON(pll->active);
> +	}
> +
>  	intel_crtc->pch_pll = NULL;
>  }
>  
> -- 
> 1.7.11.7
> 
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-- 
Ville Syrjälä
Intel OTC