[Intel-gfx] [PATCH 06/31] drm/i915: move shared_dpll into the pipe config

[Ville Syrjälä]

On Wed, Jun 05, 2013 at 01:34:08PM +0200, Daniel Vetter wrote:
> With the big sed-job prep work done this is now really simple.

Since the pipe config is built up from scratch for modeset_pipes,
aren't we losing track of which PLL we were using previously?

We only unref the previous PLL for modeset_pipes in
ironlake_crtc_mode_set() by which time we've replace the pipe config
with the newly computed one.

For disable_pipes we en up in ironlake_crtc_off() which will do the
right thing since it still has the original pipe config to consult.

> 
> v2: Kill the funny whitespace spotted by Chris.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 10 +++++-----
>  drivers/gpu/drm/i915/intel_drv.h     |  5 +++--
>  2 files changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index d95d813..b09c9a2 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -896,10 +896,10 @@ intel_crtc_to_shared_dpll(struct intel_crtc *crtc)
>  {
>  	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
>  
> -	if (crtc->shared_dpll < 0)
> +	if (crtc->config.shared_dpll < 0)
>  		return NULL;
>  
> -	return &dev_priv->shared_dplls[crtc->shared_dpll];
> +	return &dev_priv->shared_dplls[crtc->config.shared_dpll];
>  }
>  
>  /* For ILK+ */
> @@ -2967,7 +2967,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
>  			sel = TRANSC_DPLLB_SEL;
>  			break;
>  		}
> -		if (intel_crtc->shared_dpll == DPLL_ID_PCH_PLL_B)
> +		if (intel_crtc->config.shared_dpll == DPLL_ID_PCH_PLL_B)
>  			temp |= sel;
>  		else
>  			temp &= ~sel;
> @@ -3055,7 +3055,7 @@ static void intel_put_shared_dpll(struct intel_crtc *crtc)
>  		WARN_ON(pll->active);
>  	}
>  
> -	crtc->shared_dpll = DPLL_ID_NONE;
> +	crtc->config.shared_dpll = DPLL_ID_NONE;
>  }
>  
>  static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc, u32 dpll, u32 fp)
> @@ -3111,7 +3111,7 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
>  	return NULL;
>  
>  found:
> -	crtc->shared_dpll = i;
> +	crtc->config.shared_dpll = i;
>  	DRM_DEBUG_DRIVER("using pll %d for pipe %c\n", i, pipe_name(crtc->pipe));
>  	if (pll->active == 0) {
>  		DRM_DEBUG_DRIVER("setting up pll %d\n", i);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 422b2ad..e0e5d55 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -241,6 +241,9 @@ struct intel_crtc_config {
>  	 * haswell. */
>  	struct dpll dpll;
>  
> +	/* Selected dpll when shared or DPLL_ID_PRIVATE. */
> +	enum intel_dpll_id shared_dpll;
> +
>  	int pipe_bpp;
>  	struct intel_link_m_n dp_m_n;
>  
> @@ -305,8 +308,6 @@ struct intel_crtc {
>  
>  	struct intel_crtc_config config;
>  
> -	/* We can share PLLs across outputs if the timings match */
> -	enum intel_dpll_id shared_dpll;
>  	uint32_t ddi_pll_sel;
>  
>  	/* reset counter value when the last flip was submitted */
> -- 
> 1.7.11.7
> 
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-- 
Ville Syrjälä
Intel OTC