[Intel-gfx] [PATCH 00/24] irq locking review

[Daniel Vetter]

Hi all,

So here's my irq locking review, inspired by the VECS patches. The first part
(up to patch 14) deals mostly with display interrupts and especially
interactions between the hpd storm detection and the fifu underrun reporting.

Most of it is just unification, but there's two cases where locking wasn't
sufficient. Besides the cleanup it also reworks the fifo underrun reporting a
bit so that we also report underruns even when we can't enable the interrupt
(just in a delayed fashion). This is useful prep work for enabling fifo underrun
reporting on i9xx/vlv, since ther we don't ever have an interrupt. So only
delayed reporting is possible.

The second part streamlines the VECS-related interrupt handling. Contrary to my
claims I haven't found a real bug in there. But I still rest on my assertion
that the current code was too fragile, and the various shady comments did not
help in creating confidence, either. I've taken the oppportunity here though to
unify the interrupt enable sequence a bit, which should greatly help us in
keeping our sanity with the pc8+ patches.

I've tried to remove unecessary locking as much as possible (e.g. dropped irq
disabling wherever possible) so that the real required locking and ordering
sticks out more. One change I've considered but haven't (yet) done is to drop
the irq save/restore dance everywhere we know that spinlock nesting can't occur
(and is unlikely to ever get added). Again that would just better document that
no nasty spinlock nesting can happen (since lockdep viciously checks those
things). I'll probably do that in a follow-up series.

Comments, flames and review highly welcome.

Cheers, Daniel

Daniel Vetter (24):
  drm/i915: fix locking around ironlake_enable|disable_display_irq
  drm/i915: close tiny race in the ilk pcu even interrupt setup
  drm/i915: assert_spin_locked for pipestat interrupt enable/disable
  drm/i915: s/hotplug_irq_storm_detect/intel_hpd_irq_handler/
  drm/i915: fold the hpd_irq_setup call into intel_hpd_irq_handler
  drm/i915: fold the queue_work into intel_hpd_irq_handler
  drm/i915: fold the no-irq check into intel_hpd_irq_handler
  drm/i915: fix hpd interrupt register locking
  drm/i915: extract ibx_display_interrupt_update
  drm/i915: remove SERR_INT clearing in the postinstall hook
  drm/i915: improve SERR_INT clearing for fifo underrun reporting
  drm/i915: improve GEN7_ERR_INT clearing for fifo underrun reporting
  drm/i915: kill lpt pch transcoder->crtc mapping code for fifo
    underruns
  drm/i915: irq handlers don't need interrupt-safe spinlocks
  drm/i915: streamline hsw_pm_irq_handler
  drm/i915: queue work outside spinlock in hsw_pm_irq_handler
  drm/i915: kill dev_priv->rps.lock
  drm/i915: unify ring irq refcounts (again)
  drm/i915: don't enable PM_VEBOX_CS_ERROR_INTERRUPT
  drm/i915: kill bogus GTIIR clearing in vlv_preinstall hook
  drm/i915: unify PM interrupt preinstall sequence
  drm/i915: unify GT/PM irq postinstall code
  drm/i915: extract rps interrupt enable/disable helpers
  drm/i915: simplify rps interrupt enabling/disabling sequence

 drivers/gpu/drm/i915/i915_dma.c         |   1 -
 drivers/gpu/drm/i915/i915_drv.h         |   8 +-
 drivers/gpu/drm/i915/i915_irq.c         | 422 ++++++++++++++++----------------
 drivers/gpu/drm/i915/i915_reg.h         |   2 +
 drivers/gpu/drm/i915/intel_pm.c         |  65 +++--
 drivers/gpu/drm/i915/intel_ringbuffer.c |  31 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.h |   5 +-
 7 files changed, 259 insertions(+), 275 deletions(-)

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1.8.1.4