[Intel-gfx] [PATCH 2/2] drm/i915: Fix reason for per-chip disabling of FBC

Daniel Vetter daniel at ffwll.ch
Mon Jun 24 20:36:07 CEST 2013


On Mon, Jun 24, 2013 at 04:22:02PM +0100, Damien Lespiau wrote:
> When running on my snb machine, recent kernels display successively:
> 
> [drm:intel_update_fbc], fbc set to per-chip default
> [drm:intel_update_fbc], fbc disabled per module param
> 
> But no module param is set. This happens because the check for the
> module parameter uses a variable that has been overridden inside the
> "per-chip default" code.
> 
> Fix up the logic and add another reason for the FBC to the be disabled.
> 
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>

Queued for -next, thanks for the patch. Aside: checkpatch suggests an
s/seq_printf/seq_puts/ here ...
-Daniel
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c |  3 +++
>  drivers/gpu/drm/i915/i915_drv.h     |  1 +
>  drivers/gpu/drm/i915/intel_pm.c     | 14 ++++++--------
>  3 files changed, 10 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index d4e78b6..4dcaee3 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1469,6 +1469,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
>  		case FBC_MODULE_PARAM:
>  			seq_printf(m, "disabled per module param (default off)");
>  			break;
> +		case FBC_CHIP_DEFAULT:
> +			seq_printf(m, "disabled per chip default");
> +			break;
>  		default:
>  			seq_printf(m, "unknown reason");
>  		}
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 10a56c9..2b8b7ac 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -543,6 +543,7 @@ enum no_fbc_reason {
>  	FBC_NOT_TILED, /* buffer not tiled */
>  	FBC_MULTIPLE_PIPES, /* more than one pipe active */
>  	FBC_MODULE_PARAM,
> +	FBC_CHIP_DEFAULT, /* disabled by default on this chip */
>  };
>  
>  enum intel_pch {
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index a8483f5..fd70a82 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -448,7 +448,6 @@ void intel_update_fbc(struct drm_device *dev)
>  	struct drm_framebuffer *fb;
>  	struct intel_framebuffer *intel_fb;
>  	struct drm_i915_gem_object *obj;
> -	int enable_fbc;
>  	unsigned int max_hdisplay, max_vdisplay;
>  
>  	if (!i915_powersave)
> @@ -489,14 +488,13 @@ void intel_update_fbc(struct drm_device *dev)
>  	intel_fb = to_intel_framebuffer(fb);
>  	obj = intel_fb->obj;
>  
> -	enable_fbc = i915_enable_fbc;
> -	if (enable_fbc < 0) {
> -		DRM_DEBUG_KMS("fbc set to per-chip default\n");
> -		enable_fbc = 1;
> -		if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
> -			enable_fbc = 0;
> +	if (i915_enable_fbc < 0 &&
> +	    INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) {
> +		DRM_DEBUG_KMS("disabled per chip default\n");
> +		dev_priv->no_fbc_reason = FBC_CHIP_DEFAULT;
> +		goto out_disable;
>  	}
> -	if (!enable_fbc) {
> +	if (!i915_enable_fbc) {
>  		DRM_DEBUG_KMS("fbc disabled per module param\n");
>  		dev_priv->no_fbc_reason = FBC_MODULE_PARAM;
>  		goto out_disable;
> -- 
> 1.8.1.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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