[Intel-gfx] [PATCH 6/6] drm/i915: GEN6_RP_INTERRUPT_LIMITS doesn't seem to exist on VLV

[Jesse Barnes]

On Tue, 25 Jun 2013 19:21:06 +0300
ville.syrjala at linux.intel.com wrote:

> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> I can't find GEN6_RP_INTERRUPT_LIMITS (0xA014) anywhere in VLV docs.
> Reading it always returns zero from what I can tell, and eliminating
> it doesn't seem to make any difference to the behaviour of the system.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 8 ++------
>  1 file changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8b7475e..96cfb3e 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3107,7 +3107,8 @@ static void vlv_update_rps_cur_delay(struct drm_i915_private *dev_priv)
>  void valleyview_set_rps(struct drm_device *dev, u8 val)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	u32 limits = gen6_rps_limits(dev_priv, &val);
> +
> +	gen6_rps_limits(dev_priv, &val);
>  
>  	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
>  	WARN_ON(val > dev_priv->rps.max_delay);
> @@ -3126,11 +3127,6 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
>  
>  	vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
>  
> -	/* Make sure we continue to get interrupts
> -	 * until we hit the minimum or maximum frequencies.
> -	 */
> -	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);
> -
>  	dev_priv->rps.cur_delay = val;
>  
>  	trace_intel_gpu_freq_change(vlv_gpu_freq(dev_priv->mem_freq, val));

I don't see it anymore either... so Reviewed-by: Jesse Barnes
<jbarnes at virtuosugeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center