[Intel-gfx] [PATCH 04/66] drm: Optionally create mm blocks from top-to-bottom

[Daniel Vetter]

On Sun, Jun 30, 2013 at 2:30 PM, Daniel Vetter <daniel at ffwll.ch> wrote:
> On Thu, Jun 27, 2013 at 04:30:05PM -0700, Ben Widawsky wrote:
>> From: Chris Wilson <chris at chris-wilson.co.uk>
>>
>> Clients like i915 needs to segregate cache domains within the GTT which
>> can lead to small amounts of fragmentation. By allocating the uncached
>> buffers from the bottom and the cacheable buffers from the top, we can
>> reduce the amount of wasted space and also optimize allocation of the
>> mappable portion of the GTT to only those buffers that require CPU
>> access through the GTT.
>>
>> v2 by Ben:
>> Update callers in i915_gem_object_bind_to_gtt()
>> Turn search flags and allocation flags into separate enums
>> Make checkpatch happy where logical/easy
>>
>> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
>
> Since this is a core drm patch it must be cc'ed to dri-devel (and acked by
> Dave) before I can merge it. Can you please resend?

And same review as for Chris' original patch still applies: best_match
is unused (and it's better that way, really) so can be garbage
collected.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch