[Intel-gfx] [PATCH] drm/i915: Turn off hsync and vsync on ADPA when disabling crt

[Ville Syrjälä]

On Tue, Mar 05, 2013 at 02:24:48PM +0100, Patrik Jakobsson wrote:
> According to PRM we need to disable hsync and vsync even though ADPA is
> disabled. The previous code did infact do the opposite so we fix it.
> 
> Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson at gmail.com>
>
> ---
>  drivers/gpu/drm/i915/intel_crt.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index 969d08c..32a3693 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -88,7 +88,7 @@ static void intel_disable_crt(struct intel_encoder *encoder)
>  	u32 temp;
>  
>  	temp = I915_READ(crt->adpa_reg);
> -	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
> +	temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;

Accroding to the docs these bits don't exist on PCH platforms.
intel_crt_dpms() already has a check for this, so I suppose
intel_disable_crt() should have one too.

Also I noticed that we seem to have the hsync and vsync disable
bits reversed. At least that's what the docs are telling me.

>
>  	temp &= ~ADPA_DAC_ENABLE;
>  	I915_WRITE(crt->adpa_reg, temp);
>  }
> -- 
> 1.7.10.4
> 
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-- 
Ville Syrjälä
Intel OTC