[Intel-gfx] [PATCH 09/15] drm/i915: there's no PIPESTAT on Gen5+

[Daniel Vetter]

On Wed, Mar 06, 2013 at 08:03:16PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> So don't read it when capturing the error state. This solves
> "unclaimed register" messages on Haswell when we have a GPU hang.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

Iirc pipestat exists on vlv, so I think this needs a !HAS_PCH_SPLIT test.
Ville should know for sure.
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_irq.c |    5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 2139714..29b1bb1 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1366,8 +1366,9 @@ static void i915_capture_error_state(struct drm_device *dev)
>  	else if (INTEL_INFO(dev)->gen == 6)
>  		error->forcewake = I915_READ(FORCEWAKE);
>  
> -	for_each_pipe(pipe)
> -		error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
> +	if (INTEL_INFO(dev)->gen <= 4)
> +		for_each_pipe(pipe)
> +			error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
>  
>  	if (INTEL_INFO(dev)->gen >= 6) {
>  		error->error = I915_READ(ERROR_GEN6);
> -- 
> 1.7.10.4
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch