[Intel-gfx] [PATCH 07/15] drm/i915: there's no DSPADDR register on Haswell

[Ben Widawsky]

On Wed, Mar 06, 2013 at 08:03:14PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> So don't read it when we hang the GPU. This solves "unclaimed
> register" messages.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
It would be nice if you could make this a bit more future proof, but
looks correct to me:
Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 56cca6e..0451056 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9351,7 +9351,8 @@ intel_display_capture_error_state(struct drm_device *dev)
>  		if (INTEL_INFO(dev)->gen <= 3)
>  			error->plane[i].size = I915_READ(DSPSIZE(i));
>  		error->plane[i].pos = I915_READ(DSPPOS(i));
> -		error->plane[i].addr = I915_READ(DSPADDR(i));
> +		if (!IS_HASWELL(dev))
> +			error->plane[i].addr = I915_READ(DSPADDR(i));
>  		if (INTEL_INFO(dev)->gen >= 4) {
>  			error->plane[i].surface = I915_READ(DSPSURF(i));
>  			error->plane[i].tile_offset = I915_READ(DSPTILEOFF(i));
> @@ -9396,7 +9397,8 @@ intel_display_print_error_state(struct seq_file *m,
>  		if (INTEL_INFO(dev)->gen <= 3)
>  			seq_printf(m, "  SIZE: %08x\n", error->plane[i].size);
>  		seq_printf(m, "  POS: %08x\n", error->plane[i].pos);
> -		seq_printf(m, "  ADDR: %08x\n", error->plane[i].addr);
> +		if (!IS_HASWELL(dev))
> +			seq_printf(m, "  ADDR: %08x\n", error->plane[i].addr);
>  		if (INTEL_INFO(dev)->gen >= 4) {
>  			seq_printf(m, "  SURF: %08x\n", error->plane[i].surface);
>  			seq_printf(m, "  TILEOFF: %08x\n", error->plane[i].tile_offset);
> -- 
> 1.7.10.4
> 
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-- 
Ben Widawsky, Intel Open Source Technology Center