[Intel-gfx] [PATCH 10/10] [v2] drm/i915: Add a pipeless ivybridge configuration
Jesse Barnes
jbarnes at virtuousgeek.org
Tue Mar 19 20:48:40 CET 2013
On Tue, 19 Mar 2013 11:49:49 -0700
Ben Widawsky <ben at bwidawsk.net> wrote:
> On Sun, Mar 17, 2013 at 10:42:33PM +0100, Daniel Vetter wrote:
> > On Fri, Mar 15, 2013 at 11:17:55AM -0700, Ben Widawsky wrote:
> > > FIXME: This is based on some HW being used for a demo. We should
> > > probably wait until we have confirmation on the IDs before upstreaming
> > > this patch.
> >
> > I don't mind too much if we need to fixup the device after the fact, but
> > checking whether this is the shipping configuration shouldn't hurt.
> >
> > More important is probably whether there's any quanta platform with the
> > same sdev/svendor ids without a fused pch. In that case I guess we need to
> > check for something else (maybe some fuse flags in the pch?).
>
> I highly doubt it, but I don't know how to prove it. From what I gather
> on the internet and parsing through the limited uses in the kernel
> today, the subvendor/subdevice is unique.
I believe this is just an early board; for production I've requested a
unique PCI ID. We'll see what happens... If nothing else, the
existing subvendor/subdev is good for testing the new code. We can
drop it if/when we get a better check.
--
Jesse Barnes, Intel Open Source Technology Center
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